Fix missed first trial in nidq trials extractor

[k1o0]

For many BWM sessions, the first trial is not extracted correctly as the FPGA starts acquiring before the first trial. Additionally, because the Bpod pulse for the first trial is longer, in these cases the first valve open time is sometimes incorrectly assigned as the first trial.

Below is an example session (69c9a415-f7fa-4208-887b-1417c1479b48) showing the FPGA Bpod pulse along with the clock-sync'd Bpod trial events (top) and incorrect FPGA trial events (bottom). There is one fewer trial than there should be.