Generate RAL for imxrt1180

CHANGELOG.md

@@ -62,6 +62,9 @@ reserved fields.
 
 Fix the documentation associated with IOMUXC field values.
 
+Add support for NXP's i.MX RT 1189 dual-core MCUs. An `"imxrt1189_cm33"` feature
+targets the Cortex-M33, and an `"imxrt1189_cm7"` feature targets the Cortex-M7.
+
 ## [0.5.0] 2022-12-27
 
 Add support for NXP's i.MX RT 1176 dual-core MCUs. An `"imxrt1176_cm7"` feature

Cargo.toml

@@ -43,6 +43,8 @@ imxrt1062 = ["cortex-m"]
 imxrt1064 = ["cortex-m"]
 imxrt1176_cm4 = ["cortex-m"]
 imxrt1176_cm7 = ["cortex-m"]
+imxrt1189_cm33 = ["cortex-m"]
+imxrt1189_cm7 = ["cortex-m"]
 
 [workspace]
 members = [

Makefile

@@ -5,7 +5,7 @@
 
 SHELL := /usr/bin/env bash
 DEVICES ?= imxrt1011 imxrt1015 imxrt1021 imxrt1051 imxrt1052 imxrt1061 imxrt1062 imxrt1064 \
-	imxrt1176_cm7 imxrt1176_cm4
+	imxrt1176_cm7 imxrt1176_cm4 imxrt1189_cm33 imxrt1189_cm7
 
 all: patch crate rustfmt check
 

README.md

@@ -34,6 +34,8 @@ The `imxrt-ral` supports these i.MX RT processors:
 - [x] `"imxrt1064"`
 - [x] `"imxrt1176_cm4"`
 - [x] `"imxrt1176_cm7"`
+- [x] `"imxrt1189_cm33"`
+- [x] `"imxrt1189_cm7"`
 
 The RAL also **requires** a feature flag to specify the processor variant. The RAL is [on crates.io](https://crates.io/crates/imxrt-ral). The RAL provides the `"rt"` feature flag, and the interrupt table definition, that's used by the HAL.
 

build.rs

@@ -25,6 +25,10 @@ fn main() {
             "src/imxrt1176_cm4.x"
         } else if env::var_os("CARGO_FEATURE_IMXRT1176_CM7").is_some() {
             "src/imxrt1176_cm7.x"
+        } else if env::var_os("CARGO_FEATURE_IMXRT1189_CM33").is_some() {
+            "src/imxrt1189_cm33.x"
+        } else if env::var_os("CARGO_FEATURE_IMXRT1189_CM7").is_some() {
+            "src/imxrt1189_cm7.x"
         } else {
             panic!("No device features selected");
         };

devices/imxrt1189_cm33.yaml

@@ -0,0 +1,21 @@
+_svd: "../svd/imxrt1189_cm33.svd"
+
+_derive:
+    SW0_PORT2: SW0_PORT0
+
+RGPIO*:
+    _array:
+        ICR*: {}
+
+IOMUXC:
+    _modify:
+        SW_MUX_CTL_PAD_GPIO_SD_B2_12_DUMMY:
+            name: SW_MUX_CTL_PAD_GPIO_SD_B2_12
+        SW_PAD_CTL_PAD_GPIO_SD_B2_12_DUMMY:
+            name: SW_PAD_CTL_PAD_GPIO_SD_B2_12
+IOMUXC_AON:
+    _modify:
+        SW_MUX_CTL_PAD_GPIO_AON_28_DUMMY:
+            name: SW_MUX_CTL_PAD_GPIO_AON_28
+        SW_PAD_CTL_PAD_GPIO_AON_28_DUMMY:
+            name: SW_PAD_CTL_PAD_GPIO_AON_28

devices/imxrt1189_cm7.yaml

@@ -0,0 +1,21 @@
+_svd: "../svd/imxrt1189_cm7.svd"
+
+_derive:
+    SW0_PORT2: SW0_PORT0
+
+RGPIO*:
+    _array:
+        ICR*: {}
+
+IOMUXC:
+    _modify:
+        SW_MUX_CTL_PAD_GPIO_SD_B2_12_DUMMY:
+            name: SW_MUX_CTL_PAD_GPIO_SD_B2_12
+        SW_PAD_CTL_PAD_GPIO_SD_B2_12_DUMMY:
+            name: SW_PAD_CTL_PAD_GPIO_SD_B2_12
+IOMUXC_AON:
+    _modify:
+        SW_MUX_CTL_PAD_GPIO_AON_28_DUMMY:
+            name: SW_MUX_CTL_PAD_GPIO_AON_28
+        SW_PAD_CTL_PAD_GPIO_AON_28_DUMMY:
+            name: SW_PAD_CTL_PAD_GPIO_AON_28

raltool-cfg.yaml

@@ -30,6 +30,12 @@ transforms:
   - Rename:
       from: Mimxrt1176Cm4
       to: imxrt1176_cm4
+  - Rename:
+      from: Mimxrt1189Cm33
+      to: imxrt1189_cm33
+  - Rename:
+      from: Mimxrt1189Cm7
+      to: imxrt1189_cm7
   - Rename:
       from: pit::Pit1
       to: pit::Pit
@@ -130,6 +136,10 @@ transforms:
       from: lpspi::vals::Hrsel
   - DeleteEnums:
       from: lpspi::vals::Pcspol
+  # The 1189 has two DMA peripherals. Avoid collision when unifying with 10xx
+  # names.
+  - Delete:
+      from: dma3::Dma3
   # DMA and DMAMUX are suffixed with numbers on the 1176, since each core
   # has its own instance. They're also suffixed on 10xx chips, even though
   # there's just one instnace. Rename them so that the names are the same across
@@ -162,6 +172,47 @@ transforms:
       fieldset: src::regs::Srsr
       from: LOCKUP
       to: LOCKUP_SYSRESETREQ
+  # Groups of 1189 peripherals that use derivedFrom but with meaningful names
+  # instead of plain numbering. raltool only handles the numbered case, so
+  # delete them until someone needs them.
+  - Delete:
+      from: aon_mif_ln28fdsoi_spllram::AonMifLn28fdsoiSpllram
+  - Delete:
+      from: aon_mif_s28spregh::AonMifS28spregh
+  - Delete:
+      from: aon_mix_slice::AonMixSlice
+  - Delete:
+      from: enetc0_revmii_mac::Enetc0RevmiiMac
+  - Delete:
+      from: enetc0_revmii_phy::Enetc0RevmiiPhy
+  - Delete:
+      from: ethernet_pll::EthernetPll
+  - Delete:
+      from: mu2_mua::Mu2Mua
+  - Delete:
+      from: mu_apps_s3mua::MuAppsS3mua
+  - Delete:
+      from: sw0_global::Sw0Global
+  - Delete:
+      from: tstmr2_tstmra::Tstmr2Tstmra
+  - Delete:
+      from: xcache_pc::XcachePc
+  - Delete:
+      from: m33_pcf::M33Pcf1
+  # Aliased cluster arrays are not supported by raltool at the time of writing.
+  - Delete:
+      from: ecat::RxErrorCntr
+  - Delete:
+      from: ecat::ForwardedRxErrorCntr
+  - Delete:
+      from: ecat::LostLinkCntr
+  - Delete:
+      from: ecat::Fmmu
+  - Delete:
+      from: ecat::Syncmanager
+  # This one probably just needs some renaming to work.
+  - Delete:
+      from: mu2_mub::Mu2Mub
 
 # Settings for the combine pass.
 combines: