Allow deprecated atomic::spin_loop_hint()

Clippy suggests that we start using core::hint::spin_loop(). This new
function was introduced in Rust 1.49, and replaces spin_loop_hint().
We're not going to issue that breaking change right now. So, we'll
mark the existing usages as OK.

TODO:

- Pin a clippy, compiler, toolchain version in CI
- Figure out a MSRV, maybe

imxrt-hal/src/ccm/arm_clock.rs

@@ -44,6 +44,7 @@ pub fn set_arm_clock(
         // reg3_trg fits in 5 bits.
         modify_reg!(ral::dcdc, dcdc, REG3, TRG: reg3_trg_mv);
         while read_reg!(ral::dcdc, dcdc, REG0, STS_DC_OK) == 0 {
+            #[allow(deprecated)]
             core::sync::atomic::spin_loop_hint();
         }
     }
@@ -93,6 +94,7 @@ pub fn set_arm_clock(
                LOCK: 0
     );
     while read_reg!(ral::ccm_analog, ccm_analog, PLL_ARM, LOCK) == 0 {
+        #[allow(deprecated)]
         core::sync::atomic::spin_loop_hint();
     }
     log::debug!(
@@ -102,10 +104,12 @@ pub fn set_arm_clock(
 
     write_reg!(ral::ccm, ccm, CACRR, ARM_PODF: (div_arm - 1));
     while read_reg!(ral::ccm, ccm, CDHIPR, ARM_PODF_BUSY) > 0 {
+        #[allow(deprecated)]
         core::sync::atomic::spin_loop_hint();
     }
     modify_reg!(ral::ccm, ccm, CBCDR, AHB_PODF: (div_ahb - 1));
     while read_reg!(ral::ccm, ccm, CDHIPR, ARM_PODF_BUSY) > 0 {
+        #[allow(deprecated)]
         core::sync::atomic::spin_loop_hint();
     }
 
@@ -114,6 +118,7 @@ pub fn set_arm_clock(
     modify_reg!(ral::ccm, ccm, CBCDR, IPG_PODF: (div_ipg - 1));
     modify_reg!(ral::ccm, ccm, CBCDR, PERIPH_CLK_SEL: 0);
     while read_reg!(ral::ccm, ccm, CDHIPR, PERIPH_CLK_SEL_BUSY) > 0 {
+        #[allow(deprecated)]
         core::sync::atomic::spin_loop_hint();
     }
 
@@ -123,6 +128,7 @@ pub fn set_arm_clock(
         log::debug!("Decreasing voltage to {}mv", millivolts);
         modify_reg!(ral::dcdc, dcdc, REG3, TRG: reg3_trg_mv);
         while read_reg!(ral::dcdc, dcdc, REG0, STS_DC_OK) == 0 {
+            #[allow(deprecated)]
             core::sync::atomic::spin_loop_hint();
         }
     }
@@ -169,11 +175,13 @@ fn select_alt_clock(ccm: &ral::ccm::Instance, ccm_analog: &ral::ccm_analog::Inst
         modify_reg!(ral::ccm, ccm, CBCDR, PERIPH_CLK2_PODF: div);
         modify_reg!(ral::ccm, ccm, CBCMR, PERIPH_CLK2_SEL: sel);
         while read_reg!(ral::ccm, ccm, CDHIPR, PERIPH2_CLK_SEL_BUSY) > 0 {
+            #[allow(deprecated)]
             core::sync::atomic::spin_loop_hint();
         }
 
         modify_reg!(ral::ccm, ccm, CBCDR, PERIPH_CLK_SEL: 1);
         while read_reg!(ral::ccm, ccm, CDHIPR, PERIPH_CLK_SEL_BUSY) > 0 {
+            #[allow(deprecated)]
             core::sync::atomic::spin_loop_hint();
         }
     } else {

imxrt-hal/src/dma/peripheral.rs

@@ -247,6 +247,7 @@ where
         self.peripheral.disable_source();
         let rx_channel = self.rx_channel.as_mut().unwrap();
         while rx_channel.is_hardware_signaling() {
+            #[allow(deprecated)]
             core::sync::atomic::spin_loop_hint();
         }
         rx_channel.set_enable(false);
@@ -386,6 +387,7 @@ where
         self.peripheral.disable_destination();
         let tx_channel = self.tx_channel.as_mut().unwrap();
         while tx_channel.is_hardware_signaling() {
+            #[allow(deprecated)]
             core::sync::atomic::spin_loop_hint();
         }
         tx_channel.set_enable(false);

imxrt-hal/src/srtc.rs

@@ -155,6 +155,7 @@ fn disable(snvs: &mut Instance) {
     // SRTC locking is not implemented, so if it's locked then the user did it manually.
     ral::modify_reg!(ral::snvs, snvs, LPCR, SRTC_ENV: SRTC_ENV_0); // disable SRTC
     while is_enabled(snvs) {
+        #[allow(deprecated)]
         core::sync::atomic::spin_loop_hint();
     } // wait until SRTC turns off
 }
@@ -174,6 +175,7 @@ fn set(snvs: &mut Instance, time: u32, ticks: u16) {
 fn enable(snvs: &mut Instance) {
     ral::modify_reg!(ral::snvs, snvs, LPCR, SRTC_ENV: SRTC_ENV_1); // enable SRTC
     while !is_enabled(snvs) {
+        #[allow(deprecated)]
         core::sync::atomic::spin_loop_hint();
     } // wait until SRTC turns on
 }

imxrt-hal/src/trng.rs

@@ -260,6 +260,7 @@ impl TRNG {
         let (ccm, _) = ccm.raw();
         modify_reg!(trng, self.reg, MCTL, PRGM: 1);
         while read_reg!(trng, self.reg, MCTL, TSTOP_OK) == 0 {
+            #[allow(deprecated)]
             core::sync::atomic::spin_loop_hint();
         }
         // need to wait for TSTOP_OK before disabling clock or the ring oscillator will keep running