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Reworked connections to 74*165s to put the sense pins #7
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…er for the board layout.
I'll submit a second pull request with the board file when I finish routing the board. So far, I've routed everything left of column 12 (U4, U5, power, expansion connectors, micro controllers), All of the Servos, All of the CA/AN connections on the sensors, all of the 3v3 on the sensors, both power lines for the LED drive. I've got everything pretty well placed and it's just a matter of finishing the routing which is a bit of a slog, but mostly a copy of the left half of the board, so the hard work is done. |
Obviously, this new order will also require some reworking of the software. I'll do that after I finish routing the board. |
cool.. I may wait to merge it until we get the software figured out.... or
maybe there's another way to do this?
…On Thu, May 7, 2020 at 5:38 PM owendelong ***@***.***> wrote:
Obviously, this new order will also require some reworking of the software.
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I haven't had a chance to examine the code yet, but I think it's just a matter of redefining which bits coming from the serial chips represent which sensors. I'm presuming there's some form of map defined in the software that just needs to be updated. |
Yea, pretty straightforward. There's probably about 1/2 dozen people that
have started on this project (mostly through instructables) with the old
board though... I'm kind of inclined not to change the code right now. I
just don't want to field a bunch of questions.
…On Fri, May 8, 2020 at 12:59 PM owendelong ***@***.***> wrote:
I haven't had a chance to examine the code yet, but I think it's just a
matter of redefining which bits coming from the serial chips represent
which sensors. I'm presuming there's some form of map defined in the
software that just needs to be updated.
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DO NOT MERGE I discovered that I hadn't reconnected several of the sensors yet. (OOPS!). At this point, I'll push that correction at the same time as I push the fully routed board. The software changes look like they'll be fairly straight forward and I'll work on them after I finish routing. |
…it). Fully routed board using new component names and new pinouts for SIP packs.
OK... This new commit includes a board and schematic. This uses the improved SIP layout described above, but it means that instead of being in the order 1I=A, 1O=B, 2I=C, 2O=D, 3I=E, 3O=F, 4I=G, 4O=H on the serial chips, the sensors are in the order 4I=A, 4O=B, 3I=C, 3O=D, 1O=E, 1I=F, 2O=G, 2I=H. This will complicate the code slightly, but it makes the board layout a whole lot simpler. I'll work on the code next. |
Now without using input-only pins for servo output. |
Works with new serial pinout Optimized code quite a bit, removed repetitive code. Added ability to remap serial pinout by editing simple binary array. Set up SPI reads to transfer all 6 octets in one call.
OK... I want to checkpoint this with you before I go crazy with the other sketches... Check out test_shift_registers.ino in this pull request and let me know what you think. I created a simple map and some functions to use it for mapping sensor numbers to names and for retrieving the current and old values given a sensor number. I also simplified the copy of the current data into the old data. Most of these simplifications were achieved by switching from named variables to two arrays (sensors[] and o_sensors[]). This is a fairly radical departure from your initial approach to the code, so I want to see how you feel about it before I do similar things to the other sketches. |
Oh, and I switched some of your constants to compiler macros and made use of the predefined values in boards.txt to detect which hardware we are being compiled for. |
that looks good. Streamlines a lot of the code I had. A collaborator/friend
has my bee-board right now on his hive.... I might pass this along to him
to test. It'll probably take you ~2 weeks to get your board ready to test,
eh?
…On Mon, May 11, 2020 at 2:11 AM owendelong ***@***.***> wrote:
Oh, and I switched some of your constants to compiler macros and made use
of the predefined values in boards.txt to detect which hardware we are
being compiled for.
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Cool... Yeah, I have no hardware yet and am probably more than 2 weeks from building any, so if someone can test it against real hardware and make sure I got the mapping right, that would be very useful. |
I'll get to work on the other two sketches shortly. |
Optimized code similarly to previous efforts on test_shift_registers sketch I believe there are other opportunities for optimization, but this took care of the low hanging fruit and is sufficient to work with the new hardware layout.
OK... I've uploaded a new version of bee_counting now as well. When you have him test with his hardware, make sure he knows that the gate map isn't going to work right for his hardware. I believe that if he replaces the gateman declaration with the following:
That should work with the unmodified schematic/PCB layout. |
I believe this is now ready for merge, but I'm not sure what the best way to deal with the fact that the new code requires modification to be used with the old board. |
Maybe we'll just wait till you get your board and test it and then we'll
merge. Just making sure, are you planning on building one?
…On Tue, May 12, 2020 at 12:01 AM owendelong ***@***.***> wrote:
I believe this is now ready for merge, but I'm not sure what the best way
to deal with the fact that the new code requires modification to be used
with the old board.
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I am planning on building one, but I'd like to make sure that the new code works with the old hardware too. So I've pushed a change which includes a definition for the board revision (I'm calling what I submitted "2", but we can easily change that to any value you prefer). If the REV is defined as anything < 2, it uses the map that should work with the original board. If REV is >= 2, then it uses the map for the layout I created. In the version I pushed, I left REV defined as 1 so it should be compatible with existing boards. |
that makes sense.
…On Tue, May 12, 2020 at 12:05 PM owendelong ***@***.***> wrote:
I am planning on building one, but I'd like to make sure that the new code
works with the old hardware too.
So I've pushed a change which includes a definition for the board revision
(I'm calling what I submitted "2", but we can easily change that to any
value you prefer).
If the REV is defined as anything < 2, it uses the map that should work
with the original board. If REV is >= 2, then it uses the map for the
layout I created. In the version I pushed, I left REV defined as 1 so it
should be compatible with existing boards.
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Also, when you get a chance, let me know what you think of my board solution to the resistor bypass. Basically, I put a couple of vias close to each other (one to the resistor pin and one on the power line from the MOSFET) with a "cream" area encompassing them. This should make it pretty quick and easy to solder bridge them (especially if you have paste solder and hot-air available) to bypass the SIP. The board design also sports 5 headers for servos to operate "reducer" doors. My plan on the reducer doors is to arrange them to cover 12,6,3,2,1 entrances, respectively which enables the opening of any arbitrary number of entrance gates from 1 to 24. It also includes holes for mounting possible hinge attachments (still thinking through the mechanical design for the reducer gates and actuators). In general, I tried to make the layout as simple and consistent as possible. To that end, the bottom layer is mostly horizontal runs (power and ground busses, servo signals, etc.) and the top layer is mostly vertical connections (primarily 74*165 sense lines, IR LED power/ground connections, etc. Things are a little busy at the end of the board where the micro controllers attach and I haven't added support for the servos to the code yet. The GPIO pins for the servos are not quite identical due to variations between the two micro controllers support for PWM, but were kept as similar as possible. You should be able to view the board with Eagle free even if you can't make significant changes to it. |
wow.. the routing looks really nice!
[image: image.png]
very clean lines. I'd love to see a 3D rendering of the reducer gates. Do
you have something?
I think the vias might work. It'll be interesting to see if you can get the
solder to land on that small via. Sometimes I have a hard time
soldering tiny holes for tiny through-hole components... but then again
small SMDs have no problem attracting solder.... so maybe it's just the
right combination of heat and flux.
…On Mon, May 18, 2020 at 3:29 PM owendelong ***@***.***> wrote:
Also, when you get a chance, let me know what you think of my board
solution to the resistor bypass. Basically, I put a couple of vias close to
each other (one to the resistor pin and one on the power line from the
MOSFET) with a "cream" area encompassing them. This should make it pretty
quick and easy to solder bridge them (especially if you have paste solder
and hot-air available) to bypass the SIP.
The board design also sports 5 headers for servos to operate "reducer"
doors. My plan on the reducer doors is to arrange them to cover 12,6,3,2,1
entrances, respectively which enables the opening of any arbitrary number
of entrance gates from 1 to 24.
It also includes holes for mounting possible hinge attachments (still
thinking through the mechanical design for the reducer gates and actuators).
In general, I tried to make the layout as simple and consistent as
possible. To that end, the bottom layer is mostly horizontal runs (power
and ground busses, servo signals, etc.) and the top layer is mostly
vertical connections (primarily 74*165 sense lines, IR LED power/ground
connections, etc.
Things are a little busy at the end of the board where the micro
controllers attach and I haven't added support for the servos to the code
yet. The GPIO pins for the servos are not quite identical due to variations
between the two micro controllers support for PWM, but were kept as similar
as possible.
You should be able to view the board with Eagle free even if you can't
make significant changes to it.
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On May 19, 2020, at 09:13 , Thomas ***@***.***> wrote:
wow.. the routing looks really nice!
[image: image.png]
Thanks. Glad you like it.
very clean lines. I'd love to see a 3D rendering of the reducer gates. Do
you have something?
Right now, it’s still a thought exercise. Once I get to the point of trying to turn
it from thought into reality, I’ll probably put it into Fusion 360 (now that that’s
included in Eagle) to model the full assembly.
Basically I’m thinking some 3d printed plastic sheets with a pin-hinge on
one edge and a lever to attach to the servo bell-crank via a wire actuator
sticking up and outward from the hinge.
With the horn of the bell crank forward, the door would be closed. As the
servo rotates the bell crank horn backwards, it would pull the lever backwards,
opening the door.
Once I have that in CAD, I’ll send along a 3d of the whole thing.
I think the vias might work. It'll be interesting to see if you can get the
solder to land on that small via. Sometimes I have a hard time
soldering tiny holes for tiny through-hole components... but then again
small SMDs have no problem attracting solder.... so maybe it's just the
right combination of heat and flux.
I’m hoping that the two vias together will provide enough surface area to attract
the solder. I’m also hoping that the mask elimination area (cream layer) will
make it fairly easy to bridge the solder across the gap. If it doesn’t work, I’ll
try something different and do another $60+ batch of boards or get some
compatible 0Ω packs to replace the 22Ω ones. ;-)
Owen
|
hello @owendelong ! @hydronics2 and I have collaborated on this project on and off over the years. I'm currently working on getting an mqtt based server solution in place to be able to receive data from the counter and will be turning my attention to the bee counter esp32 code after that's setup (a few weeks more I hope). It's unfortunately a side project atm. @hydronics2 and I were talking IRL (I know, crazy in this day an age) about board versioning. I think it would be helpful as new iterations of the board are created if version info could be detected by the software at startup. These methods seem interesting, but I'm not a hardware nerd, I'm a software/devops/sysadmin type... @owendelong @hydronics2 I'd love to hear your opinion on that. The goal is to support a diverse array of hardware from one codebase. This might be good fodder for a separate issue and I'm happy to open up an issue and move this conversation there. |
Sorry for the much delayed response… Been busy with other things and you gave me quite a bit to think about.
On Jun 2, 2020, at 14:57 , Benjamin Foote ***@***.***> wrote:
hello @owendelong <https://github.com/owendelong> !
@hydronics2 <https://github.com/hydronics2> and I have collaborated on this project on and off over the years. I'm currently working on getting an mqtt based server solution in place to be able to receive data from the counter and will be turning my attention to the bee counter esp32 code after that's setup (a few weeks more I hope). It's unfortunately a side project atm.
Cool!
I just got my first batch of PCBs. The CAD is starting to take shape for the case and actuators as well.
@hydronics2 <https://github.com/hydronics2> and I were talking IRL (I know, crazy in this day an age) about board versioning. I think it would be helpful as new iterations of the board are created if version info could be detected by the software at startup.
OK… That sounds good in theory, but in practice it has some shortcomings…
1. The software will have to be aware of each board flavor anyway. Tying that to a simple #define statement and having the user compile for their board rev seems about as reliable and easy as installing a pair of resistors just to identify board version.
2. We could print the software compatibility version on the board silkscreen (Prominently) for convenience if you want. (e.g.:)
3. Anything we’d do in hardware to define the board rev will, in reality, depend on extra assembly work by the end user anyway. If we were going to mass produce the board, then sure, but that’s a much bigger change as we’d want to go to SMT components to enable pick and place, we’d want to put all of the screw terminals together to enable assembly of a single component, we’d want to integrate the modules directly instead of using Feather or other header-based products, etc.
From my perspective, it’s a lot easier to change a config variable at the top of the code before compiling than it is to make sure I get the right resistors and solder 4 additional joints just to id the version of the board. The only time this is a drawback is when a particular individual has multiple systems with different board versions. In that case, having a board version ID on the board can be useful.
Anyway, more discussion of the hardware solutions below...
These methods seem interesting, but I'm not a hardware nerd, I'm a software/devops/sysadmin type...
https://electronics.stackexchange.com/questions/371696/encoding-version-or-configuration-on-pcb <https://electronics.stackexchange.com/questions/371696/encoding-version-or-configuration-on-pcb>Hey, I’m a network architect. I only fiddle with hardware for fun.
Solution 1 (N lines of GPIO) is, IMHO, a non-starter because we don’t really have the lines available.
Solution 2 might be possible, since A2 and A3 are available on both units.
Another solution that occurs to me (would only be good for up to 256 board revisions, but I think that’s plenty for our case is we could simply add another shift register at the end.
Then we could (per board revision) connect the shift register input pins to pull-up or pull-down depending on desired value.
We’d have to figure out what values get shifted in from a non-existent shift register and reserve that for the older (pre-hardware-identity) versions of the board, but presumably that’s some form of reliable deterministic value.
Hopefully it’s all 0s.
Then, of course, the question comes do we rev. the hardware version every time we rev. the board, or just when the revision requires a change to the software behavior?
I’ve managed to squeeze another shift register onto the board and layer it out with an ID of 2, so I know this is feasible.
@owendelong <https://github.com/owendelong> @hydronics2 <https://github.com/hydronics2> I'd love to hear your opinion on that. The goal is to support a diverse array of hardware from one codebase.
This might be good fodder for a separate issue and I'm happy to open up an issue and move this conversation there.
Yeah, this thread is getting a bit long and all encompassing. I should go through it and break out the individual issues, I think.
Owen
|
This puts the sense pins on the 74*165 serial chips in an order closer to the position of the attached sensors and puts them in a rational order on the SIP resistors as well.
The layout out of the chips is:
This new schematic results in the SIP pack being connected as follows:
This results in a left to right pin order on the resistor pack which is (e.g.)
1 Outside
1 Inside
2 Outside
2 Inside
3 Outside
3 Inside
4 Outside
4 Inside
(This is repeated for packs 5/6/7/8, 9/10/11/12, etc.)
Doing it this way made it possible to route the sense lines in a much more compact manner on the board which freed up space to place headers to connect servos.