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riscv: dts: add initial board data for the SiFive HiFive Unmatched
Add initial board data for the SiFive HiFive Unmatched A00. This patch is dependent on Zong's Patchset[0]. [0]: https://lore.kernel.org/linux-riscv/[email protected]/T/#u Signed-off-by: Yash Shah <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
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# SPDX-License-Identifier: GPL-2.0 | ||
dtb-$(CONFIG_SOC_SIFIVE) += hifive-unleashed-a00.dtb | ||
dtb-$(CONFIG_SOC_SIFIVE) += hifive-unleashed-a00.dtb \ | ||
hifive-unmatched-a00.dtb |
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// SPDX-License-Identifier: (GPL-2.0 OR MIT) | ||
/* Copyright (c) 2020 SiFive, Inc */ | ||
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#include "fu740-c000.dtsi" | ||
#include <dt-bindings/interrupt-controller/irq.h> | ||
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/* Clock frequency (in Hz) of the PCB crystal for rtcclk */ | ||
#define RTCCLK_FREQ 1000000 | ||
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/ { | ||
#address-cells = <2>; | ||
#size-cells = <2>; | ||
model = "SiFive HiFive Unmatched A00"; | ||
compatible = "sifive,hifive-unmatched-a00", "sifive,fu740-c000", | ||
"sifive,fu740"; | ||
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chosen { | ||
stdout-path = "serial0"; | ||
}; | ||
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cpus { | ||
timebase-frequency = <RTCCLK_FREQ>; | ||
}; | ||
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memory@80000000 { | ||
device_type = "memory"; | ||
reg = <0x0 0x80000000 0x2 0x00000000>; | ||
}; | ||
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soc { | ||
}; | ||
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hfclk: hfclk { | ||
#clock-cells = <0>; | ||
compatible = "fixed-clock"; | ||
clock-frequency = <26000000>; | ||
clock-output-names = "hfclk"; | ||
}; | ||
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rtcclk: rtcclk { | ||
#clock-cells = <0>; | ||
compatible = "fixed-clock"; | ||
clock-frequency = <RTCCLK_FREQ>; | ||
clock-output-names = "rtcclk"; | ||
}; | ||
}; | ||
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&uart0 { | ||
status = "okay"; | ||
}; | ||
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&uart1 { | ||
status = "okay"; | ||
}; | ||
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&i2c0 { | ||
status = "okay"; | ||
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temperature-sensor@4c { | ||
compatible = "ti,tmp451"; | ||
reg = <0x4c>; | ||
interrupt-parent = <&gpio>; | ||
interrupts = <6 IRQ_TYPE_LEVEL_LOW>; | ||
}; | ||
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pmic@58 { | ||
compatible = "dlg,da9063"; | ||
reg = <0x58>; | ||
interrupt-parent = <&gpio>; | ||
interrupts = <1 IRQ_TYPE_LEVEL_LOW>; | ||
interrupt-controller; | ||
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regulators { | ||
vdd_bcore1: bcore1 { | ||
regulator-min-microvolt = <900000>; | ||
regulator-max-microvolt = <900000>; | ||
regulator-min-microamp = <5000000>; | ||
regulator-max-microamp = <5000000>; | ||
regulator-always-on; | ||
}; | ||
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vdd_bcore2: bcore2 { | ||
regulator-min-microvolt = <900000>; | ||
regulator-max-microvolt = <900000>; | ||
regulator-min-microamp = <5000000>; | ||
regulator-max-microamp = <5000000>; | ||
regulator-always-on; | ||
}; | ||
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vdd_bpro: bpro { | ||
regulator-min-microvolt = <1800000>; | ||
regulator-max-microvolt = <1800000>; | ||
regulator-min-microamp = <2500000>; | ||
regulator-max-microamp = <2500000>; | ||
regulator-always-on; | ||
}; | ||
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vdd_bperi: bperi { | ||
regulator-min-microvolt = <1050000>; | ||
regulator-max-microvolt = <1050000>; | ||
regulator-min-microamp = <1500000>; | ||
regulator-max-microamp = <1500000>; | ||
regulator-always-on; | ||
}; | ||
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vdd_bmem: bmem { | ||
regulator-min-microvolt = <1200000>; | ||
regulator-max-microvolt = <1200000>; | ||
regulator-min-microamp = <3000000>; | ||
regulator-max-microamp = <3000000>; | ||
regulator-always-on; | ||
}; | ||
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vdd_bio: bio { | ||
regulator-min-microvolt = <1200000>; | ||
regulator-max-microvolt = <1200000>; | ||
regulator-min-microamp = <3000000>; | ||
regulator-max-microamp = <3000000>; | ||
regulator-always-on; | ||
}; | ||
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vdd_ldo1: ldo1 { | ||
regulator-min-microvolt = <1800000>; | ||
regulator-max-microvolt = <1800000>; | ||
regulator-min-microamp = <100000>; | ||
regulator-max-microamp = <100000>; | ||
regulator-always-on; | ||
}; | ||
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vdd_ldo2: ldo2 { | ||
regulator-min-microvolt = <1800000>; | ||
regulator-max-microvolt = <1800000>; | ||
regulator-min-microamp = <200000>; | ||
regulator-max-microamp = <200000>; | ||
regulator-always-on; | ||
}; | ||
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vdd_ldo3: ldo3 { | ||
regulator-min-microvolt = <1800000>; | ||
regulator-max-microvolt = <1800000>; | ||
regulator-min-microamp = <200000>; | ||
regulator-max-microamp = <200000>; | ||
regulator-always-on; | ||
}; | ||
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vdd_ldo4: ldo4 { | ||
regulator-min-microvolt = <1800000>; | ||
regulator-max-microvolt = <1800000>; | ||
regulator-min-microamp = <200000>; | ||
regulator-max-microamp = <200000>; | ||
regulator-always-on; | ||
}; | ||
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vdd_ldo5: ldo5 { | ||
regulator-min-microvolt = <1800000>; | ||
regulator-max-microvolt = <1800000>; | ||
regulator-min-microamp = <100000>; | ||
regulator-max-microamp = <100000>; | ||
regulator-always-on; | ||
}; | ||
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vdd_ldo6: ldo6 { | ||
regulator-min-microvolt = <3300000>; | ||
regulator-max-microvolt = <3300000>; | ||
regulator-min-microamp = <200000>; | ||
regulator-max-microamp = <200000>; | ||
regulator-always-on; | ||
}; | ||
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vdd_ldo7: ldo7 { | ||
regulator-min-microvolt = <1800000>; | ||
regulator-max-microvolt = <1800000>; | ||
regulator-min-microamp = <200000>; | ||
regulator-max-microamp = <200000>; | ||
regulator-always-on; | ||
}; | ||
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vdd_ldo8: ldo8 { | ||
regulator-min-microvolt = <1800000>; | ||
regulator-max-microvolt = <1800000>; | ||
regulator-min-microamp = <200000>; | ||
regulator-max-microamp = <200000>; | ||
regulator-always-on; | ||
}; | ||
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vdd_ld09: ldo9 { | ||
regulator-min-microvolt = <1050000>; | ||
regulator-max-microvolt = <1050000>; | ||
regulator-min-microamp = <200000>; | ||
regulator-max-microamp = <200000>; | ||
}; | ||
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vdd_ldo10: ldo10 { | ||
regulator-min-microvolt = <1000000>; | ||
regulator-max-microvolt = <1000000>; | ||
regulator-min-microamp = <300000>; | ||
regulator-max-microamp = <300000>; | ||
}; | ||
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vdd_ldo11: ldo11 { | ||
regulator-min-microvolt = <2500000>; | ||
regulator-max-microvolt = <2500000>; | ||
regulator-min-microamp = <300000>; | ||
regulator-max-microamp = <300000>; | ||
regulator-always-on; | ||
}; | ||
}; | ||
}; | ||
}; | ||
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&qspi0 { | ||
status = "okay"; | ||
flash@0 { | ||
compatible = "issi,is25wp256", "jedec,spi-nor"; | ||
reg = <0>; | ||
spi-max-frequency = <50000000>; | ||
m25p,fast-read; | ||
spi-tx-bus-width = <4>; | ||
spi-rx-bus-width = <4>; | ||
}; | ||
}; | ||
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&spi0 { | ||
status = "okay"; | ||
mmc@0 { | ||
compatible = "mmc-spi-slot"; | ||
reg = <0>; | ||
spi-max-frequency = <20000000>; | ||
voltage-ranges = <3300 3300>; | ||
disable-wp; | ||
}; | ||
}; | ||
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ð0 { | ||
status = "okay"; | ||
phy-mode = "gmii"; | ||
phy-handle = <&phy0>; | ||
phy0: ethernet-phy@0 { | ||
reg = <0>; | ||
}; | ||
}; | ||
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&pwm0 { | ||
status = "okay"; | ||
}; | ||
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&pwm1 { | ||
status = "okay"; | ||
}; | ||
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&gpio { | ||
status = "okay"; | ||
}; |