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More sensible approach to the sc problem that broke Beats #18133

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Sep 11, 2023
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8 changes: 5 additions & 3 deletions Core/MIPS/x86/CompLoadStore.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -80,7 +80,7 @@ namespace MIPSComp {
return in;
}

void Jit::CompITypeMemWrite(MIPSOpcode op, u32 bits, const void *safeFunc)
void Jit::CompITypeMemWrite(MIPSOpcode op, u32 bits, const void *safeFunc, bool makeRTWritable)
{
CONDITIONAL_DISABLE(LSU);
int offset = _IMM16;
Expand All @@ -90,6 +90,9 @@ namespace MIPSComp {
gpr.Lock(rt, rs);

if (rt == MIPS_REG_ZERO || gpr.R(rt).IsImm()) {
if (makeRTWritable) {
gpr.MapReg(rt, true, true);
}
// NOTICE_LOG(JIT, "%d-bit Imm at %08x : %08x", bits, js.blockStart, (u32)gpr.R(rt).GetImmValue());
} else {
gpr.MapReg(rt, true, false);
Expand Down Expand Up @@ -428,8 +431,7 @@ namespace MIPSComp {
CMP(8, MDisp(X64JitConstants::CTXREG, -128 + offsetof(MIPSState, llBit)), Imm8(1));
skipStore = J_CC(CC_NE);

CompITypeMemWrite(op, 32, safeMemFuncs.writeU32);
gpr.MapReg(rt, true, true);
CompITypeMemWrite(op, 32, safeMemFuncs.writeU32, true);
MOV(32, gpr.R(rt), Imm32(1));
finish = J();

Expand Down
2 changes: 1 addition & 1 deletion Core/MIPS/x86/Jit.h
Original file line number Diff line number Diff line change
Expand Up @@ -225,7 +225,7 @@ class Jit : public Gen::XCodeBlock, public JitInterface, public MIPSFrontendInte
void CompITypeMemRead(MIPSOpcode op, u32 bits, void (XEmitter::*mov)(int, int, Gen::X64Reg, Gen::OpArg), T (*safeFunc)(u32 addr)) {
CompITypeMemRead(op, bits, mov, (const void *)safeFunc);
}
void CompITypeMemWrite(MIPSOpcode op, u32 bits, const void *safeFunc);
void CompITypeMemWrite(MIPSOpcode op, u32 bits, const void *safeFunc, bool makeRTWritable = false);
template <typename T>
void CompITypeMemWrite(MIPSOpcode op, u32 bits, void (*safeFunc)(T val, u32 addr)) {
CompITypeMemWrite(op, bits, (const void *)safeFunc);
Expand Down