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headless: Add some new and passing tests #16046

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merged 2 commits into from
Sep 18, 2022

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unknownbrackets
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Also small fix to an existing one to make it pass as well.

-[Unknown]

@unknownbrackets unknownbrackets added this to the v1.14.0 milestone Sep 18, 2022
LDRB(tempReg3, srcReg, dec_->posoff + 2);
static const ARMReg tr[3] = { tempReg1, tempReg2, tempReg3 };
static const ARMReg fr[3] = { fpScratchReg, fpScratchReg2, fpScratchReg3 };
// Intentionally just sets all to zero.
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I think a better comment here is what you have below:

// 8-bit positions in throughmode always decode to 0, depth included.

fp.SCVTF(fpScratchReg, tempReg1);
fp.SCVTF(fpScratchReg2, tempReg2);
fp.SCVTF(fpScratchReg3, tempReg3);
// Intentionally just sets all to zero.
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Same

@@ -872,22 +872,14 @@ void VertexDecoderJitCache::Jit_NormalFloat() {
STMIA(scratchReg, false, 3, tempReg1, tempReg2, tempReg3);
}

// Through expands into floats, always. Might want to look at changing this.
void VertexDecoderJitCache::Jit_PosS8Through() {
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Should this be renamed PosInvalid too?

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@unknownbrackets unknownbrackets Sep 18, 2022

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Well, "invalid" I used for when no position is specified at all, and the verts are all culled.

However, when a position is specified, as s8 in through, it is not culled. It decodes to zero. So it's kinda invalid, but different from "invalid position in throughmode (no bits set)" which has different behavior.

That is to say:

  • (vertType & GE_VTYPE_POS_MASK) == 0 -> invalid, no drawing occurs.
  • (vertType & GE_VTYPE_POS_MASK) == GE_VTYPE_POS_8BIT && (vertType & GE_VTYPE_THROUGH) != 0 ->
    "valid", but decodes to zero.
  • (vertType & GE_VTYPE_POS_MASK) == GE_VTYPE_POS_8BIT && (vertType & GE_VTYPE_THROUGH) == 0 -> valid, and decodes to sensible values.

(this behavior is all demonstrated in the "invalidprim" test.)

-[Unknown]

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@unknownbrackets unknownbrackets Sep 18, 2022

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As to Arm/Arm64/etc. - I figured might as well keep these jitted, although they're hopefully rarely being hit. I didn't think it was worth bothering to newly jit invalid, though.

-[Unknown]

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Ok, cool. Thanks for the clarifications!

Also always cull no-position verts, hardware too.  Matches tests.
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Feel free to merge if it's ready :)

@unknownbrackets unknownbrackets merged commit f2beafe into hrydgard:master Sep 18, 2022
@unknownbrackets unknownbrackets deleted the tests-update branch September 18, 2022 16:00
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2 participants