-
Notifications
You must be signed in to change notification settings - Fork 2.2k
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
headless: Add some new and passing tests #16046
headless: Add some new and passing tests #16046
Conversation
GPU/Common/VertexDecoderArm.cpp
Outdated
LDRB(tempReg3, srcReg, dec_->posoff + 2); | ||
static const ARMReg tr[3] = { tempReg1, tempReg2, tempReg3 }; | ||
static const ARMReg fr[3] = { fpScratchReg, fpScratchReg2, fpScratchReg3 }; | ||
// Intentionally just sets all to zero. |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
I think a better comment here is what you have below:
// 8-bit positions in throughmode always decode to 0, depth included.
GPU/Common/VertexDecoderArm64.cpp
Outdated
fp.SCVTF(fpScratchReg, tempReg1); | ||
fp.SCVTF(fpScratchReg2, tempReg2); | ||
fp.SCVTF(fpScratchReg3, tempReg3); | ||
// Intentionally just sets all to zero. |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Same
@@ -872,22 +872,14 @@ void VertexDecoderJitCache::Jit_NormalFloat() { | |||
STMIA(scratchReg, false, 3, tempReg1, tempReg2, tempReg3); | |||
} | |||
|
|||
// Through expands into floats, always. Might want to look at changing this. | |||
void VertexDecoderJitCache::Jit_PosS8Through() { |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Should this be renamed PosInvalid too?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Well, "invalid" I used for when no position is specified at all, and the verts are all culled.
However, when a position is specified, as s8 in through, it is not culled. It decodes to zero. So it's kinda invalid, but different from "invalid position in throughmode (no bits set)" which has different behavior.
That is to say:
(vertType & GE_VTYPE_POS_MASK) == 0
-> invalid, no drawing occurs.(vertType & GE_VTYPE_POS_MASK) == GE_VTYPE_POS_8BIT && (vertType & GE_VTYPE_THROUGH) != 0
->
"valid", but decodes to zero.(vertType & GE_VTYPE_POS_MASK) == GE_VTYPE_POS_8BIT && (vertType & GE_VTYPE_THROUGH) == 0
-> valid, and decodes to sensible values.
(this behavior is all demonstrated in the "invalidprim" test.)
-[Unknown]
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
As to Arm/Arm64/etc. - I figured might as well keep these jitted, although they're hopefully rarely being hit. I didn't think it was worth bothering to newly jit invalid, though.
-[Unknown]
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Ok, cool. Thanks for the clarifications!
Also always cull no-position verts, hardware too. Matches tests.
c71e0a6
to
ca248e1
Compare
Feel free to merge if it's ready :) |
Also small fix to an existing one to make it pass as well.
-[Unknown]