Merge pull request #16676 from unknownbrackets/riscv-disasm

Add disassembler for RISC-V
hrydgard · Jan 4, 2023 · 830f106 · 830f106
2 parents 0076897 + cee8bfd
commit 830f106
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Showing 15 changed files with 3,053 additions and 1 deletion.
diff --git a/CMakeLists.txt b/CMakeLists.txt
@@ -472,6 +472,7 @@ set(CommonARM64
 	Common/Arm64Emitter.cpp
 	Common/ArmEmitter.h
 	Common/ArmEmitter.cpp
+	Core/Util/DisArm64.h
 	Core/Util/DisArm64.cpp
 )
 source_group(ARM64 FILES ${CommonARM64})
@@ -2032,6 +2033,9 @@ add_library(${CoreLibName} ${CoreLinkType}
 	Core/Util/PPGeDraw.h
 	${GPU_SOURCES}
 	ext/disarm.cpp
+	ext/disarm.h
+	ext/riscv-disas.cpp
+	ext/riscv-disas.h
 	${CMAKE_CURRENT_BINARY_DIR}/git-version.cpp
 )
 

diff --git a/Core/Core.vcxproj b/Core/Core.vcxproj
@@ -526,6 +526,7 @@
     <ClCompile Include="..\ext\libzip\zip_unchange_archive.c" />
     <ClCompile Include="..\ext\libzip\zip_unchange_data.c" />
     <ClCompile Include="..\ext\libzip\zip_utf-8.c" />
+    <ClCompile Include="..\ext\riscv-disas.cpp" />
     <ClCompile Include="..\ext\sfmt19937\SFMT.c" />
     <ClCompile Include="..\ext\sha1\sha1.cpp" />
     <ClCompile Include="..\ext\snappy\snappy-c.cpp" />
@@ -1091,6 +1092,7 @@
     <ClInclude Include="..\ext\libzip\zip_source_file.h" />
     <ClInclude Include="..\ext\libzip\zip_source_file_stdio.h" />
     <ClInclude Include="..\ext\libzip\zip_source_file_win32.h" />
+    <ClInclude Include="..\ext\riscv-disas.h" />
     <ClInclude Include="..\ext\sfmt19937\SFMT-common.h" />
     <ClInclude Include="..\ext\sfmt19937\SFMT-params.h" />
     <ClInclude Include="..\ext\sfmt19937\SFMT-params19937.h" />

diff --git a/Core/Core.vcxproj.filters b/Core/Core.vcxproj.filters
@@ -1192,6 +1192,9 @@
     <ClCompile Include="WaveFile.cpp">
       <Filter>Core</Filter>
     </ClCompile>
+    <ClCompile Include="..\ext\riscv-disas.cpp">
+      <Filter>Ext</Filter>
+    </ClCompile>
   </ItemGroup>
   <ItemGroup>
     <ClInclude Include="ELF\ElfReader.h">
@@ -1926,6 +1929,9 @@
     <ClInclude Include="WaveFile.h">
       <Filter>Core</Filter>
     </ClInclude>
+    <ClInclude Include="..\ext\riscv-disas.h">
+      <Filter>Ext</Filter>
+    </ClInclude>
   </ItemGroup>
   <ItemGroup>
     <None Include="..\LICENSE.TXT" />

diff --git a/Core/MIPS/JitCommon/JitBlockCache.cpp b/Core/MIPS/JitCommon/JitBlockCache.cpp
@@ -639,6 +639,9 @@ int JitBlockCache::GetBlockExitSize() {
 #elif PPSSPP_ARCH(ARM64)
 	// Will depend on the sequence found to encode the destination address.
 	return 0;
+#elif PPSSPP_ARCH(RISCV64)
+	// Will depend on the sequence found to encode the destination address.
+	return 0;
 #else
 #warning GetBlockExitSize unimplemented
 	return 0;
@@ -690,6 +693,8 @@ JitBlockDebugInfo JitBlockCache::GetBlockDebugInfo(int blockNum) const {
 	debugInfo.targetDisasm = DisassembleArm64(block->normalEntry, block->codeSize);
 #elif PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
 	debugInfo.targetDisasm = DisassembleX86(block->normalEntry, block->codeSize);
+#elif PPSSPP_ARCH(ARM64)
+	debugInfo.targetDisasm = DisassembleRV64(block->normalEntry, block->codeSize);
 #endif
 
 	return debugInfo;

diff --git a/Core/MIPS/JitCommon/JitCommon.cpp b/Core/MIPS/JitCommon/JitCommon.cpp
@@ -20,6 +20,7 @@
 #include <mutex>
 
 #include "ext/disarm.h"
+#include "ext/riscv-disas.h"
 #include "ext/udis86/udis86.h"
 
 #include "Common/LogReporting.h"
@@ -306,3 +307,40 @@ std::vector<std::string> DisassembleX86(const u8 *data, int size) {
 }
 
 #endif
+
+#if PPSSPP_ARCH(RISCV64) || defined(DISASM_ALL)
+std::vector<std::string> DisassembleRV64(const u8 *data, int size) {
+	std::vector<std::string> lines;
+
+	int invalid_count = 0;
+	auto invalid_flush = [&]() {
+		if (invalid_count != 0) {
+			lines.push_back(StringFromFormat("(%d invalid bytes)", invalid_count));
+			invalid_count = 0;
+		}
+	};
+
+	char temp[512];
+	rv_inst inst;
+	size_t len;
+	for (int i = 0; i < size; ) {
+		riscv_inst_fetch(data + i, &inst, &len);
+		if (len == 0) {
+			// Force align in case we're somehow unaligned.
+			len = 2 - ((uintptr_t)data & 1);
+			invalid_count += len;
+			i += len;
+			continue;
+		}
+
+		invalid_flush();
+		riscv_disasm_inst(temp, sizeof(temp), rv64, i * 4, inst);
+		lines.push_back(ReplaceAll(temp, "\t", "  "));
+
+		i += (int)len;
+	}
+
+	invalid_flush();
+	return lines;
+}
+#endif
diff --git a/Core/MIPS/JitCommon/JitCommon.h b/Core/MIPS/JitCommon/JitCommon.h
@@ -28,6 +28,7 @@
 std::vector<std::string> DisassembleArm2(const u8 *data, int size);
 std::vector<std::string> DisassembleArm64(const u8 *data, int size);
 std::vector<std::string> DisassembleX86(const u8 *data, int size);
+std::vector<std::string> DisassembleRV64(const u8 *data, int size);
 
 struct JitBlock;
 class JitBlockCache;

diff --git a/Core/MemFault.cpp b/Core/MemFault.cpp
@@ -84,6 +84,12 @@ static bool DisassembleNativeAt(const uint8_t *codePtr, int instructionSize, std
 		*dest = lines[0];
 		return true;
 	}
+#elif PPSSPP_ARCH(RISCV64)
+	auto lines = DisassembleRV64(codePtr, instructionSize);
+	if (!lines.empty()) {
+		*dest = lines[0];
+		return true;
+	}
 #endif
 	return false;
 }

diff --git a/GPU/Common/VertexDecoderCommon.cpp b/GPU/Common/VertexDecoderCommon.cpp
@@ -1359,6 +1359,8 @@ std::string VertexDecoder::GetString(DebugShaderStringType stringType) {
 			lines = DisassembleArm2((const u8 *)jitted_, jittedSize_);
 #elif PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
 			lines = DisassembleX86((const u8 *)jitted_, jittedSize_);
+#elif PPSSPP_ARCH(RISCV64)
+			lines = DisassembleRV64((const u8 *)jitted_, jittedSize_);
 #else
 			// No disassembler defined
 #endif

diff --git a/UWP/CoreUWP/CoreUWP.vcxproj b/UWP/CoreUWP/CoreUWP.vcxproj
@@ -603,6 +603,7 @@
     <ClInclude Include="..\..\ext\cityhash\city.h" />
     <ClInclude Include="..\..\ext\cityhash\citycrc.h" />
     <ClInclude Include="..\..\ext\disarm.h" />
+    <ClInclude Include="..\..\ext\riscv-disas.h" />
     <ClInclude Include="..\..\ext\gason\gason.h" />
     <ClInclude Include="..\..\ext\jpge\jpgd.h" />
     <ClInclude Include="..\..\ext\jpge\jpge.h" />
@@ -888,6 +889,7 @@
     <ClCompile Include="..\..\Core\WaveFile.cpp" />
     <ClCompile Include="..\..\ext\cityhash\city.cpp" />
     <ClCompile Include="..\..\ext\disarm.cpp" />
+    <ClCompile Include="..\..\ext\riscv-disas.cpp" />
     <ClCompile Include="..\..\ext\gason\gason.cpp" />
     <ClCompile Include="..\..\ext\jpge\jpgd.cpp" />
     <ClCompile Include="..\..\ext\jpge\jpge.cpp" />

diff --git a/UWP/CoreUWP/CoreUWP.vcxproj.filters b/UWP/CoreUWP/CoreUWP.vcxproj.filters
@@ -62,6 +62,9 @@
     <Filter Include="Ext\disarm">
       <UniqueIdentifier>{e0604f48-5522-43e8-ba22-6d08bc2ccacd}</UniqueIdentifier>
     </Filter>
+    <Filter Include="Ext\riscv-disas">
+      <UniqueIdentifier>{e0604f48-5522-43e8-ba22-6d08bc2ccaee}</UniqueIdentifier>
+    </Filter>
     <Filter Include="MIPS\IR">
       <UniqueIdentifier>{9c6552c2-9858-41da-a920-31ea5628d417}</UniqueIdentifier>
     </Filter>
@@ -608,6 +611,9 @@
     <ClCompile Include="..\..\ext\disarm.cpp">
       <Filter>Ext\disarm</Filter>
     </ClCompile>
+    <ClCompile Include="..\..\ext\riscv-disas.cpp">
+      <Filter>Ext\riscv-disas</Filter>
+    </ClCompile>
     <ClCompile Include="..\..\ext\xxhash.c">
       <Filter>Ext</Filter>
     </ClCompile>
@@ -1638,6 +1644,9 @@
     <ClInclude Include="..\..\ext\disarm.h">
       <Filter>Ext\disarm</Filter>
     </ClInclude>
+    <ClInclude Include="..\..\ext\riscv-disas.h">
+      <Filter>Ext\riscv-disas</Filter>
+    </ClInclude>
     <ClInclude Include="..\..\ext\xxhash.h">
       <Filter>Ext</Filter>
     </ClInclude>

diff --git a/android/jni/Android.mk b/android/jni/Android.mk
@@ -772,6 +772,7 @@ ifeq ($(UNITTEST),1)
       $(SRC)/Core/MIPS/ARM/ArmRegCacheFPU.cpp \
       $(SRC)/Core/Util/DisArm64.cpp \
       $(SRC)/ext/disarm.cpp \
+      $(SRC)/ext/riscv-disas.cpp \
       $(SRC)/unittest/TestArmEmitter.cpp \
       $(SRC)/unittest/TestArm64Emitter.cpp \
       $(SRC)/unittest/TestRiscVEmitter.cpp \