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Merge pull request #8843 from unknownbrackets/ir-debug
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Add initial breakpoint support for IR
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hrydgard authored Jul 2, 2016
2 parents 5d5f252 + 1df0851 commit 6a24cde
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Showing 8 changed files with 111 additions and 23 deletions.
58 changes: 51 additions & 7 deletions Core/MIPS/IR/IRFrontend.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -18,12 +18,12 @@
#include "base/logging.h"

#include "Common/ChunkFile.h"
#include "Core/Debugger/Breakpoints.h"
#include "Core/Debugger/SymbolMap.h"
#include "Core/Reporting.h"
#include "Core/HLE/ReplaceTables.h"
#include "Core/MemMap.h"

#include "Core/MIPS/MIPSTables.h"
#include "Core/HLE/ReplaceTables.h"

#include "Core/MIPS/IR/IRFrontend.h"
#include "Core/MIPS/IR/IRRegCache.h"
#include "Core/MIPS/IR/IRPassSimplify.h"
Expand All @@ -37,6 +37,10 @@ IRFrontend::IRFrontend(bool startDefaultPrefix) {
js.startDefaultPrefix = true;
js.hasSetRounding = false;
// js.currentRoundingFunc = convertS0ToSCRATCH1[0];

// The debugger sets this so that "go" on a breakpoint will actually... go.
// But if they reset, we can end up hitting it by mistake, since it's based on PC and ticks.
CBreakPoints::SetSkipFirst(0);
}

void IRFrontend::DoState(PointerWrap &p) {
Expand All @@ -51,6 +55,10 @@ void IRFrontend::DoState(PointerWrap &p) {
} else {
js.hasSetRounding = 1;
}

// The debugger sets this so that "go" on a breakpoint will actually... go.
// But if they reset, we can end up hitting it by mistake, since it's based on PC and ticks.
CBreakPoints::SetSkipFirst(0);
}

void IRFrontend::FlushAll() {
Expand Down Expand Up @@ -83,13 +91,15 @@ void IRFrontend::EatInstruction(MIPSOpcode op) {
ERROR_LOG_REPORT_ONCE(ateInDelaySlot, JIT, "Ate an instruction inside a delay slot.");
}

CheckBreakpoint(GetCompilerPC() + 4, 0);
js.numInstructions++;
js.compilerPC += 4;
js.downcountAmount += MIPSGetInstructionCycleEstimate(op);
}

void IRFrontend::CompileDelaySlot() {
js.inDelaySlot = true;
CheckBreakpoint(GetCompilerPC() + 4, -2);
MIPSOpcode op = GetOffsetInstruction(1);
MIPSCompileOp(op, this);
js.inDelaySlot = false;
Expand Down Expand Up @@ -129,7 +139,18 @@ void IRFrontend::Comp_ReplacementFunc(MIPSOpcode op) {
return;
}

if (entry->flags & REPFLAG_DISABLED) {
u32 funcSize = g_symbolMap->GetFunctionSize(GetCompilerPC());
bool disabled = (entry->flags & REPFLAG_DISABLED) != 0;
if (!disabled && funcSize != SymbolMap::INVALID_ADDRESS && funcSize > sizeof(u32)) {
// We don't need to disable hooks, the code will still run.
if ((entry->flags & (REPFLAG_HOOKENTER | REPFLAG_HOOKEXIT)) == 0) {
// Any breakpoint at the func entry was already tripped, so we can still run the replacement.
// That's a common case - just to see how often the replacement hits.
disabled = CBreakPoints::RangeContainsBreakPoint(GetCompilerPC() + sizeof(u32), funcSize - sizeof(u32));
}
}

if (disabled) {
MIPSCompileOp(Memory::Read_Instruction(GetCompilerPC(), true), this);
} else if (entry->replaceFunc) {
FlushAll();
Expand Down Expand Up @@ -200,7 +221,7 @@ MIPSOpcode IRFrontend::GetOffsetInstruction(int offset) {
return Memory::Read_Instruction(GetCompilerPC() + 4 * offset);
}

void IRFrontend::DoJit(u32 em_address, std::vector<IRInst> &instructions, std::vector<u32> &constants) {
void IRFrontend::DoJit(u32 em_address, std::vector<IRInst> &instructions, std::vector<u32> &constants, u32 &mipsBytes) {
js.cancel = false;
js.blockStart = em_address;
js.compilerPC = em_address;
Expand All @@ -210,12 +231,16 @@ void IRFrontend::DoJit(u32 em_address, std::vector<IRInst> &instructions, std::v
js.downcountAmount = 0;
js.curBlock = nullptr;
js.compiling = true;
js.hadBreakpoints = false;
js.inDelaySlot = false;
js.PrefixStart();
ir.Clear();

js.numInstructions = 0;
while (js.compiling) {
// Jit breakpoints are quite fast, so let's do them in release too.
CheckBreakpoint(GetCompilerPC(), 0);

MIPSOpcode inst = Memory::Read_Opcode_JIT(GetCompilerPC());
js.downcountAmount += MIPSGetInstructionCycleEstimate(inst);
MIPSCompileOp(inst, this);
Expand All @@ -229,9 +254,11 @@ void IRFrontend::DoJit(u32 em_address, std::vector<IRInst> &instructions, std::v
}
}

mipsBytes = js.compilerPC - em_address;

IRWriter simplified;
IRWriter *code = &ir;
if (true) {
if (!js.hadBreakpoints) {
static const IRPassFunc passes[] = {
&OptimizeFPMoves,
&PropagateConstants,
Expand Down Expand Up @@ -291,4 +318,21 @@ void IRFrontend::Comp_RunBlock(MIPSOpcode op) {
ERROR_LOG(JIT, "Comp_RunBlock should never be reached!");
}

} // namespace
void IRFrontend::CheckBreakpoint(u32 addr, int downcountOffset) {
if (CBreakPoints::IsAddressBreakPoint(addr)) {
FlushAll();

RestoreRoundingMode();
ir.Write(IROp::SetPCConst, 0, ir.AddConstant(GetCompilerPC()));
int downcountAmount = js.downcountAmount + downcountOffset;
ir.Write(IROp::Downcount, 0, downcountAmount & 0xFF, downcountAmount >> 8);
// Note that this means downcount can't be metadata on the block.
js.downcountAmount = -downcountAmount;
ir.Write(IROp::Breakpoint);
ApplyRoundingMode();

js.hadBreakpoints = true;
}
}

} // namespace
6 changes: 4 additions & 2 deletions Core/MIPS/IR/IRFrontend.h
Original file line number Diff line number Diff line change
Expand Up @@ -88,7 +88,7 @@ class IRFrontend : public MIPSFrontendInterface {
void DoState(PointerWrap &p);
bool CheckRounding(); // returns true if we need a do-over

void DoJit(u32 em_address, std::vector<IRInst> &instructions, std::vector<u32> &constants);
void DoJit(u32 em_address, std::vector<IRInst> &instructions, std::vector<u32> &constants, u32 &mipsBytes);

void EatPrefix() override {
js.EatPrefix();
Expand All @@ -107,6 +107,8 @@ class IRFrontend : public MIPSFrontendInterface {
void EatInstruction(MIPSOpcode op);
MIPSOpcode GetOffsetInstruction(int offset);

void CheckBreakpoint(u32 addr, int downcountOffset);

// Utility compilation functions
void BranchFPFlag(MIPSOpcode op, IRComparison cc, bool likely);
void BranchVFPUFlag(MIPSOpcode op, IRComparison cc, bool likely);
Expand Down Expand Up @@ -136,4 +138,4 @@ class IRFrontend : public MIPSFrontendInterface {
int logBlocks;
};

} // namespace
} // namespace
1 change: 1 addition & 0 deletions Core/MIPS/IR/IRInst.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -156,6 +156,7 @@ static const IRMeta irMeta[] = {
{ IROp::SetPC, "SetPC", "_G" },
{ IROp::SetPCConst, "SetPC", "_C" },
{ IROp::CallReplacement, "CallRepl", "_C" },
{ IROp::Breakpoint, "Breakpoint", "" },
};

const IRMeta *metaIndex[256];
Expand Down
7 changes: 4 additions & 3 deletions Core/MIPS/IR/IRInst.h
Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,7 @@ enum class IROp : u8 {
ShrImm,
SarImm,
RorImm,

Slt,
SltConst,
SltU,
Expand Down Expand Up @@ -92,7 +92,7 @@ enum class IROp : u8 {
MsubU,
Div,
DivU,

// These take a constant from the pool as an offset.
// Loads from a constant address can be represented by using r0.
Load8,
Expand Down Expand Up @@ -219,6 +219,7 @@ enum class IROp : u8 {
SetPCConst, // hack to make replacement know PC
CallReplacement,
Break,
Breakpoint,
};

enum IRComparison {
Expand Down Expand Up @@ -315,7 +316,7 @@ enum IRFlags {
struct IRMeta {
IROp op;
const char *name;
const char types[4]; // GGG
const char types[4]; // GGG
u32 flags;
};

Expand Down
30 changes: 28 additions & 2 deletions Core/MIPS/IR/IRInterpreter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -8,16 +8,19 @@
#include <xmmintrin.h>
#endif

#include "Core/MemMap.h"
#include "Core/Core.h"
#include "Core/CoreTiming.h"
#include "Core/Debugger/Breakpoints.h"
#include "Core/HLE/HLE.h"
#include "Core/HLE/ReplaceTables.h"
#include "Core/Host.h"
#include "Core/MemMap.h"
#include "Core/MIPS/MIPS.h"
#include "Core/MIPS/MIPSTables.h"
#include "Core/MIPS/MIPSVFPUUtils.h"
#include "Core/MIPS/IR/IRInst.h"
#include "Core/MIPS/IR/IRInterpreter.h"
#include "Core/System.h"
#include "Core/CoreTiming.h"

alignas(16) float vec4InitValues[8][4] = {
{ 0.0f, 0.0f, 0.0f, 0.0f },
Expand All @@ -29,6 +32,21 @@ alignas(16) float vec4InitValues[8][4] = {
{ 0.0f, 0.0f, 0.0f, 1.0f },
};

u32 RunBreakpoint(u32 pc) {
// Should we skip this breakpoint?
if (CBreakPoints::CheckSkipFirst() == pc)
return 0;

auto cond = CBreakPoints::GetBreakPointCondition(pc);
if (cond && !cond->Evaluate())
return 0;

Core_EnableStepping(true);
host->SetDebugMode(true);

return 1;
}

u32 IRInterpret(MIPSState *mips, const IRInst *inst, const u32 *constPool, int count) {
const IRInst *end = inst + count;
while (inst != end) {
Expand Down Expand Up @@ -783,6 +801,14 @@ u32 IRInterpret(MIPSState *mips, const IRInst *inst, const u32 *constPool, int c
memcpy(&mips->vfpuCtrl[inst->dest], &mips->f[inst->src1], 4);
break;

case IROp::Breakpoint:
if (RunBreakpoint(mips->pc)) {
if (coreState != CORE_RUNNING)
CoreTiming::ForceCheck();
return mips->pc;
}
break;

default:
Crash();
}
Expand Down
24 changes: 16 additions & 8 deletions Core/MIPS/IR/IRJit.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -20,23 +20,20 @@
#include "Common/ChunkFile.h"
#include "Common/StringUtils.h"

#include "Core/Reporting.h"
#include "Core/Config.h"
#include "Core/Core.h"
#include "Core/CoreTiming.h"
#include "Core/Debugger/SymbolMap.h"
#include "Core/HLE/sceKernelMemory.h"
#include "Core/MemMap.h"

#include "Core/MIPS/MIPS.h"
#include "Core/MIPS/MIPSCodeUtils.h"
#include "Core/MIPS/MIPSInt.h"
#include "Core/MIPS/MIPSTables.h"
#include "Core/HLE/sceKernelMemory.h"
#include "Core/MIPS/IR/IRRegCache.h"
#include "Core/MIPS/IR/IRJit.h"
#include "Core/MIPS/IR/IRPassSimplify.h"
#include "Core/MIPS/IR/IRInterpreter.h"
#include "Core/MIPS/JitCommon/JitCommon.h"
#include "Core/Reporting.h"

namespace MIPSComp {

Expand Down Expand Up @@ -88,8 +85,10 @@ void IRJit::Compile(u32 em_address) {

std::vector<IRInst> instructions;
std::vector<u32> constants;
frontend_.DoJit(em_address, instructions, constants);
u32 mipsBytes;
frontend_.DoJit(em_address, instructions, constants, mipsBytes);
b->SetInstructions(instructions, constants);
b->SetOriginalSize(mipsBytes);
b->Finalize(block_num); // Overwrites the first instruction

if (frontend_.CheckRounding()) {
Expand Down Expand Up @@ -155,8 +154,13 @@ void IRBlockCache::Clear() {
blocks_.clear();
}

void IRBlockCache::InvalidateICache(u32 addess, u32 length) {
// TODO
void IRBlockCache::InvalidateICache(u32 address, u32 length) {
// TODO: Could be more efficient.
for (int i = 0; i < size_; ++i) {
if (blocks_[i].OverlapsRange(address, length)) {
blocks_[i].Destroy(i);
}
}
}

std::vector<u32> IRBlockCache::SaveAndClearEmuHackOps() {
Expand Down Expand Up @@ -220,6 +224,10 @@ void IRBlock::Destroy(int number) {
}
}

bool IRBlock::OverlapsRange(u32 addr, u32 size) {
return addr + size > origAddr_ && addr < origAddr_ + origSize_;
}

MIPSOpcode IRJit::GetOriginalOp(MIPSOpcode op) {
IRBlock *b = blocks_.GetBlock(op.encoding & 0xFFFFFF);
return b->GetOriginalFirstOp();
Expand Down
7 changes: 6 additions & 1 deletion Core/MIPS/IR/IRJit.h
Original file line number Diff line number Diff line change
Expand Up @@ -100,6 +100,10 @@ class IRBlock {
bool HasOriginalFirstOp();
bool RestoreOriginalFirstOp(int number);
bool IsValid() const { return origAddr_ != 0; }
void SetOriginalSize(u32 size) {
origSize_ = size;
}
bool OverlapsRange(u32 addr, u32 size);

void Finalize(int number);
void Destroy(int number);
Expand All @@ -110,13 +114,14 @@ class IRBlock {
u16 numInstructions_;
u16 numConstants_;
u32 origAddr_;
u32 origSize_;
MIPSOpcode origFirstOpcode_;
};

class IRBlockCache {
public:
void Clear();
void InvalidateICache(u32 addess, u32 length);
void InvalidateICache(u32 address, u32 length);
int GetNumBlocks() const { return (int)blocks_.size(); }
int AllocateBlock(int emAddr) {
blocks_.push_back(IRBlock(emAddr));
Expand Down
1 change: 1 addition & 0 deletions Core/MIPS/JitCommon/JitState.h
Original file line number Diff line number Diff line change
Expand Up @@ -77,6 +77,7 @@ namespace MIPSComp {
int downcountAmount;
int numInstructions;
bool compiling; // TODO: get rid of this in favor of using analysis results to determine end of block
bool hadBreakpoints;
JitBlock *curBlock;

u8 hasSetRounding;
Expand Down

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