Port developments not previously rebased onto 13_0_0_pre2

L1Trigger/L1THGCal/interface/backend/HGCalStage1TruncationConfig_SA.h

@@ -4,7 +4,7 @@
 #include <vector>
 #include <cstdint>  // uint32_t
 
-namespace l1thgcfirmware {
+namespace l1thgcfirmwareDUMMY {
 
   class Stage1TruncationConfig {
   public:
@@ -67,6 +67,6 @@ namespace l1thgcfirmware {
     uint32_t fpga_id_;
   };
 
-}  // namespace l1thgcfirmware
+}  // namespace l1thgcfirmwareDUMMY
 
 #endif

L1Trigger/L1THGCal/interface/backend/HGCalStage1TruncationImpl_SA.h

@@ -16,9 +16,9 @@ class HGCalStage1TruncationImplSA {
 
   void runAlgorithm() const;
 
-  unsigned run(const l1thgcfirmware::HGCalTriggerCellSACollection& tcs_in,
-               const l1thgcfirmware::Stage1TruncationConfig& theConf,
-               l1thgcfirmware::HGCalTriggerCellSACollection& tcs_out) const;
+  unsigned run(const l1thgcfirmwareDUMMY::HGCalTriggerCellSACollection& tcs_in,
+               const l1thgcfirmwareDUMMY::Stage1TruncationConfig& theConf,
+               l1thgcfirmwareDUMMY::HGCalTriggerCellSACollection& tcs_out) const;
 
   int phiBin(unsigned roverzbin, double phi, const std::vector<double>& phiedges) const;
   double rotatedphi(double x, double y, double z, int sector) const;

L1Trigger/L1THGCal/interface/backend/HGCalTriggerCell_SA.h

@@ -3,7 +3,7 @@
 
 #include <vector>
 
-namespace l1thgcfirmware {
+namespace l1thgcfirmwareDUMMY {
 
   class HGCalTriggerCell {
   public:
@@ -58,6 +58,6 @@ namespace l1thgcfirmware {
 
   typedef std::vector<HGCalTriggerCell> HGCalTriggerCellSACollection;
 
-}  // namespace l1thgcfirmware
+}  // namespace l1thgcfirmwareDUMMY
 
 #endif

L1Trigger/L1THGCal/interface/backend_emulator/HGCalStage1SortingAlg_SA.h

@@ -0,0 +1,62 @@
+#ifndef __L1Trigger_L1THGCal_HGCalStage1SortingAlg_SA_h__
+#define __L1Trigger_L1THGCal_HGCalStage1SortingAlg_SA_h__
+
+#include <vector>
+#include <memory>
+#include <cstdint>  // unsigned
+
+typedef std::vector<unsigned> datain_t;      // elements to sort
+typedef std::vector<unsigned> datasorter_t;  // elements to process in sorter
+typedef std::vector<unsigned> datamerger_t;  // elements to process in merger
+typedef std::vector<unsigned> dataout_t;     // elements selected
+
+typedef std::vector<unsigned> adressin_t;      // elements addresses to sort
+typedef std::vector<unsigned> adresssorter_t;  // elements addresses to process in sorter
+typedef std::vector<unsigned> adressmerger_t;  // elements addresses to process in merger
+typedef std::vector<unsigned> adressout_t;     // elements addresses selected
+
+typedef std::vector<unsigned> data_to_sort_t;   // Data Pointer for sorter function
+typedef std::vector<unsigned> data_to_merge_t;  // Data Pointer for merger function
+typedef std::vector<unsigned> adress_t;         // Address Pointer for sorter & merger functions
+
+namespace l1thgcfirmware {
+
+  class HGCalStage1SortingAlg_SA {
+  public:
+    HGCalStage1SortingAlg_SA();
+
+    HGCalStage1SortingAlg_SA(const unsigned NTCin, const unsigned NTCout) : N(NTCin), M(NTCout) {
+      unsigned ns = NTCin / 4;
+      unsigned nma = (NTCout < (NTCin / 4)) ? 2 * NTCout : NTCin / 2;
+      unsigned nmb = (NTCout < nma) ? 2 * NTCout : 2 * nma;
+      setNS(ns);
+      setNMA(nma);
+      setNMB(nmb);
+    }
+
+    ~HGCalStage1SortingAlg_SA() {}
+
+    //Generates the sorting network
+    void sorting(const datain_t& arr_input, dataout_t& arr_output, adressout_t& arr_adresses) const;
+
+    void setNS(const unsigned NSval) { NS = NSval; }
+    void setNMA(const unsigned NMAval) { NMA = NMAval; }
+    void setNMB(const unsigned NMBval) { NMB = NMBval; }
+
+  private:
+    //Sorter algorithm
+    void sorter(data_to_sort_t& list_sorter, adress_t& list_adresses) const;
+    //Merger algorithm
+    void merger(const unsigned& NM, data_to_merge_t& list_merger, adress_t& list_adresses) const;
+    //Calculate base 2 logarithm , and round to next integer
+    unsigned log2_rounded(unsigned i) const;
+
+    const unsigned N;  // number of total elements to sort
+    const unsigned M;  // number of elements to select
+    unsigned NS;       // number of elements to sort sequentially (block sorter input size)
+    unsigned NMA;      // number of elements to merge in block merger a (block merger a input size)
+    unsigned NMB;      // number of elements to merge in block merger b (block merger b input size)
+  };
+}  // namespace l1thgcfirmware
+
+#endif

L1Trigger/L1THGCal/interface/backend_emulator/HGCalStage1TruncationConfig_SA.h

@@ -0,0 +1,74 @@
+#ifndef __L1Trigger_L1THGCal_HGCalStage1TruncationConfig_SA_h__
+#define __L1Trigger_L1THGCal_HGCalStage1TruncationConfig_SA_h__
+
+#include <vector>
+#include <cstdint>  // uint32_t
+
+namespace l1thgcfirmware {
+
+  class Stage1TruncationConfig {
+  public:
+    Stage1TruncationConfig() {}
+
+    Stage1TruncationConfig(const bool do_truncate,
+                           const double roz_min,
+                           const double roz_max,
+                           const unsigned roz_bins,
+                           const std::vector<unsigned>& max_tcs_per_bins,
+                           const std::vector<double>& phi_edges)
+        : do_truncate_(do_truncate),
+          roz_min_(roz_min),
+          roz_max_(roz_max),
+          roz_bins_(roz_bins),
+          max_tcs_per_bins_(max_tcs_per_bins),
+          phi_edges_(phi_edges) {}
+
+    void setParameters(const bool do_truncate,
+                       const double roz_min,
+                       const double roz_max,
+                       const unsigned roz_bins,
+                       const std::vector<unsigned>& max_tcs_per_bins,
+                       const std::vector<double>& phi_edges) {
+      do_truncate_ = do_truncate;
+      roz_min_ = roz_min;
+      roz_max_ = roz_max;
+      roz_bins_ = roz_bins;
+      max_tcs_per_bins_ = max_tcs_per_bins;
+      phi_edges_ = phi_edges;
+    }
+
+    void setParameters(const Stage1TruncationConfig& newConfig) {
+      setParameters(newConfig.doTruncate(),
+                    newConfig.rozMin(),
+                    newConfig.rozMax(),
+                    newConfig.rozBins(),
+                    newConfig.maxTcsPerBin(),
+                    newConfig.phiEdges());
+    }
+
+    void setSector120(const unsigned sector) { sector120_ = sector; }
+    void setFPGAID(const uint32_t fpga_id) { fpga_id_ = fpga_id; }
+
+    bool doTruncate() const { return do_truncate_; }
+    double rozMin() const { return roz_min_; }
+    double rozMax() const { return roz_max_; }
+    unsigned rozBins() const { return roz_bins_; }
+    const std::vector<unsigned>& maxTcsPerBin() const { return max_tcs_per_bins_; }
+    const std::vector<double>& phiEdges() const { return phi_edges_; }
+    unsigned phiSector() const { return sector120_; }
+    uint32_t fpgaID() const { return fpga_id_; }
+
+  private:
+    bool do_truncate_;
+    double roz_min_;
+    double roz_max_;
+    unsigned roz_bins_;
+    std::vector<unsigned> max_tcs_per_bins_;
+    std::vector<double> phi_edges_;
+    unsigned sector120_;
+    uint32_t fpga_id_;
+  };
+
+}  // namespace l1thgcfirmware
+
+#endif

L1Trigger/L1THGCal/interface/backend_emulator/HGCalStage1TruncationImpl_SA.h

@@ -0,0 +1,48 @@
+#ifndef __L1Trigger_L1THGCal_HGCalStage1TruncationImpl_SA_h__
+#define __L1Trigger_L1THGCal_HGCalStage1TruncationImpl_SA_h__
+
+#include "L1Trigger/L1THGCal/interface/backend_emulator/HGCalTriggerCell_SA.h"
+#include "L1Trigger/L1THGCal/interface/backend_emulator/HGCalStage1TruncationConfig_SA.h"
+#include "L1Trigger/L1THGCal/interface/backend_emulator/HGCalStage1SortingAlg_SA.h"
+
+#include <vector>
+#include <cstdint>        // uint32_t, unsigned
+#include <unordered_map>  // std::unordered_map
+
+namespace l1thgcfirmware {
+
+  class HGCalStage1TruncationImplSA {
+  public:
+    HGCalStage1TruncationImplSA();
+    ~HGCalStage1TruncationImplSA() {}
+
+    void runAlgorithm() const;
+
+    unsigned run(const l1thgcfirmware::HGCalTriggerCellSACollection& tcs_in,
+                 const l1thgcfirmware::Stage1TruncationConfig& theConf,
+                 l1thgcfirmware::HGCalTriggerCellSACollection& tcs_out) const;
+
+  private:
+    static constexpr unsigned offset_roz_ = 1;
+    static constexpr unsigned mask_roz_ = 0x3f;  // 6 bits, max 64 bins
+    static constexpr unsigned mask_phi_ = 1;
+
+    bool do_truncate_;
+    double roz_min_ = 0.;
+    double roz_max_ = 0.;
+    unsigned roz_bins_ = 42;
+    std::vector<unsigned> max_tcs_per_bin_;
+    std::vector<double> phi_edges_;
+
+    uint32_t packBin(unsigned roverzbin, unsigned phibin) const;
+    void unpackBin(unsigned packedbin, unsigned& roverzbin, unsigned& phibin) const;
+    int phiBin(unsigned roverzbin, double phi, const std::vector<double>& phiedges) const;
+    double rotatedphi(double x, double y, double z, unsigned sector) const;
+    double rotatedphi(double phi, unsigned sector) const;
+
+    unsigned smallerMultOfFourGreaterThan(unsigned n) const;
+  };
+
+}  // namespace l1thgcfirmware
+
+#endif

L1Trigger/L1THGCal/plugins/backend/HGCalStage1TruncationWrapper.cc

@@ -1,9 +1,9 @@
 #include "L1Trigger/L1THGCal/interface/HGCalAlgoWrapperBase.h"
 
 #include "DataFormats/L1THGCal/interface/HGCalTriggerCell.h"
-#include "L1Trigger/L1THGCal/interface/backend/HGCalTriggerCell_SA.h"
-#include "L1Trigger/L1THGCal/interface/backend/HGCalStage1TruncationImpl_SA.h"
-#include "L1Trigger/L1THGCal/interface/backend/HGCalStage1TruncationConfig_SA.h"
+#include "L1Trigger/L1THGCal/interface/backend_emulator/HGCalTriggerCell_SA.h"
+#include "L1Trigger/L1THGCal/interface/backend_emulator/HGCalStage1TruncationImpl_SA.h"
+#include "L1Trigger/L1THGCal/interface/backend_emulator/HGCalStage1TruncationConfig_SA.h"
 
 #include "L1Trigger/L1THGCal/interface/HGCalTriggerTools.h"
 
@@ -28,9 +28,15 @@ class HGCalStage1TruncationWrapper : public HGCalStage1TruncationWrapperBase {
 
   void setGeometry(const HGCalTriggerGeometryBase* const geom) { triggerTools_.setGeometry(geom); }
 
+  double rotatedphi(double phi, unsigned sector) const;
+  unsigned rozBin(double roverz, double rozmin, double rozmax, unsigned rozbins) const;
+
   HGCalTriggerTools triggerTools_;
-  HGCalStage1TruncationImplSA theAlgo_;
+  l1thgcfirmware::HGCalStage1TruncationImplSA theAlgo_;
   l1thgcfirmware::Stage1TruncationConfig theConfiguration_;
+
+  // Scale factor for quantities sent to emulator to keep floating point precision. Value is arbitrary and could be set to relevant value.
+  const unsigned int FWfactor_ = 10000;
 };
 
 HGCalStage1TruncationWrapper::HGCalStage1TruncationWrapper(const edm::ParameterSet& conf)
@@ -49,16 +55,19 @@ void HGCalStage1TruncationWrapper::convertCMSSWInputs(const std::vector<edm::Ptr
   fpga_tcs_SA.reserve(fpga_tcs.size());
   unsigned int itc = 0;
   for (auto& tc : fpga_tcs) {
-    fpga_tcs_SA.emplace_back(tc->position().x(),
-                             tc->position().y(),
-                             tc->position().z(),
-                             triggerTools_.zside(tc->detId()),
-                             triggerTools_.layerWithOffset(tc->detId()),
-                             tc->eta(),
-                             tc->phi(),
-                             tc->pt(),
-                             tc->mipPt(),
-                             itc);
+    const GlobalPoint& position = tc->position();
+    double x = position.x();
+    double y = position.y();
+    double z = position.z();
+    double roverz = (std::sqrt(x * x + y * y) / std::abs(z));
+    unsigned int rOverZbin =
+        rozBin(roverz, theConfiguration_.rozMin(), theConfiguration_.rozMax(), theConfiguration_.rozBins());
+    double phi = rotatedphi(tc->phi(), theConfiguration_.phiSector());
+    phi += (phi < 0) ? M_PI : 0;
+    unsigned int digi_phi = phi * FWfactor_;
+    unsigned int digi_energy = (tc->mipPt()) * FWfactor_;
+    fpga_tcs_SA.emplace_back(true, true, rOverZbin, digi_phi, triggerTools_.layerWithOffset(tc->detId()), digi_energy);
+    fpga_tcs_SA.back().setCmsswIndex(std::make_pair(itc, 0));
     ++itc;
   }
 }
@@ -68,8 +77,9 @@ void HGCalStage1TruncationWrapper::convertAlgorithmOutputs(
     const std::vector<edm::Ptr<l1t::HGCalTriggerCell>>& fpga_tcs_original,
     std::vector<edm::Ptr<l1t::HGCalTriggerCell>>& fpga_tcs_trunc) const {
   for (auto& tc : fpga_tcs_out) {
-    unsigned tc_cmssw_id = tc.index_cmssw();
-    fpga_tcs_trunc.push_back(fpga_tcs_original[tc_cmssw_id]);
+    unsigned tc_cmssw_id = tc.cmsswIndex().first;
+    if (tc_cmssw_id < fpga_tcs_original.size())
+      fpga_tcs_trunc.emplace_back(fpga_tcs_original[tc_cmssw_id]);
   }
 }
 
@@ -95,6 +105,30 @@ void HGCalStage1TruncationWrapper::configure(
   theConfiguration_.setFPGAID(std::get<2>(configuration));
 };
 
+double HGCalStage1TruncationWrapper::rotatedphi(double phi, unsigned sector) const {
+  if (sector == 1) {
+    if (phi < M_PI and phi > 0)
+      phi = phi - (2. * M_PI / 3.);
+    else
+      phi = phi + (4. * M_PI / 3.);
+  } else if (sector == 2) {
+    phi = phi + (2. * M_PI / 3.);
+  }
+  return phi;
+}
+
+unsigned HGCalStage1TruncationWrapper::rozBin(double roverz, double rozmin, double rozmax, unsigned rozbins) const {
+  constexpr double margin = 1.001;
+  double roz_bin_size = (rozbins > 0 ? (rozmax - rozmin) * margin / double(rozbins) : 0.);
+  unsigned roverzbin = 0;
+  if (roz_bin_size > 0.) {
+    roverz -= rozmin;
+    roverz = std::clamp(roverz, 0., rozmax - rozmin);
+    roverzbin = unsigned(roverz / roz_bin_size);
+  }
+  return roverzbin;
+}
+
 DEFINE_EDM_PLUGIN(HGCalStage1TruncationWrapperBaseFactory,
                   HGCalStage1TruncationWrapper,
                   "HGCalStage1TruncationWrapper");

L1Trigger/L1THGCal/src/backend/HGCalStage1TruncationImpl_SA.cc

@@ -1,11 +1,11 @@
 #include "L1Trigger/L1THGCal/interface/backend/HGCalStage1TruncationImpl_SA.h"
 #include <cmath>
 
-unsigned HGCalStage1TruncationImplSA::run(const l1thgcfirmware::HGCalTriggerCellSACollection& tcs_in,
-                                          const l1thgcfirmware::Stage1TruncationConfig& theConf,
-                                          l1thgcfirmware::HGCalTriggerCellSACollection& tcs_out) const {
+unsigned HGCalStage1TruncationImplSA::run(const l1thgcfirmwareDUMMY::HGCalTriggerCellSACollection& tcs_in,
+                                          const l1thgcfirmwareDUMMY::Stage1TruncationConfig& theConf,
+                                          l1thgcfirmwareDUMMY::HGCalTriggerCellSACollection& tcs_out) const {
   unsigned sector120 = theConf.phiSector();
-  std::unordered_map<unsigned, l1thgcfirmware::HGCalTriggerCellSACollection> tcs_per_bin;
+  std::unordered_map<unsigned, l1thgcfirmwareDUMMY::HGCalTriggerCellSACollection> tcs_per_bin;
 
   // configuation:
   bool do_truncate = theConf.doTruncate();
@@ -35,9 +35,8 @@ unsigned HGCalStage1TruncationImplSA::run(const l1thgcfirmware::HGCalTriggerCell
   for (auto& bin_tcs : tcs_per_bin) {
     std::sort(bin_tcs.second.begin(),
               bin_tcs.second.end(),
-              [](const l1thgcfirmware::HGCalTriggerCell& a, const l1thgcfirmware::HGCalTriggerCell& b) -> bool {
-                return a.mipPt() > b.mipPt();
-              });
+              [](const l1thgcfirmwareDUMMY::HGCalTriggerCell& a,
+                 const l1thgcfirmwareDUMMY::HGCalTriggerCell& b) -> bool { return a.mipPt() > b.mipPt(); });
 
     unsigned roverzbin = 0;
     unsigned phibin = 0;