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Optee #93

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Oct 28, 2019
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Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
From e915a809d0f03e0f2ebb3ad585b2206c0d4b2511 Mon Sep 17 00:00:00 2001
From: Jorge Ramirez-Ortiz <[email protected]>
Date: Sun, 27 Oct 2019 16:39:45 +0100
Subject: [FIO toup] plat-imx: configure the SHMEM section

Signed-off-by: Jorge Ramirez-Ortiz <[email protected]>
---
core/arch/arm/plat-imx/main.c | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/core/arch/arm/plat-imx/main.c b/core/arch/arm/plat-imx/main.c
index c632fa85..602365b5 100644
--- a/core/arch/arm/plat-imx/main.c
+++ b/core/arch/arm/plat-imx/main.c
@@ -112,6 +112,10 @@ register_phys_mem(MEM_AREA_TEE_COHERENT,
CORE_MMU_PGDIR_SIZE);
#endif

+#ifdef TEE_SHMEM_START
+register_dynamic_shm(TEE_SHMEM_START, TEE_SHMEM_SIZE);
+#endif
+
#if defined(CFG_PL310)
register_phys_mem_pgdir(MEM_AREA_IO_SEC,
ROUNDDOWN(PL310_BASE, CORE_MMU_PGDIR_SIZE),
--
2.17.1

Original file line number Diff line number Diff line change
@@ -0,0 +1,180 @@
From 4c9838a2028cd77acf4cedefa6fa07b5720f7de9 Mon Sep 17 00:00:00 2001
From: Jorge Ramirez-Ortiz <[email protected]>
Date: Sun, 27 Oct 2019 16:40:45 +0100
Subject: [PATCH] [FIO toup] Support overlay at fix address and extend DTS

The following commit adds support to extend any DTS passed as an input
parameter to OPTEE during boot as well as generate a OPTEE specific
DTS overlay at a build specific address (CFG_OVERLAY_ADDR).

When this feature is enabled, CFG_DT_ADDR and CFG_EXTERNAL_DTB_OVERLAY
are no longer required.

Signed-off-by: Jorge Ramirez-Ortiz <[email protected]>
---
core/arch/arm/kernel/generic_boot.c | 37 ++++++++++++++++++++++++++---
mk/config.mk | 20 ++++++++++++++++
2 files changed, 54 insertions(+), 3 deletions(-)

diff --git a/core/arch/arm/kernel/generic_boot.c b/core/arch/arm/kernel/generic_boot.c
index 2bed4937..a41da047 100644
--- a/core/arch/arm/kernel/generic_boot.c
+++ b/core/arch/arm/kernel/generic_boot.c
@@ -78,6 +78,9 @@ KEEP_PAGER(sem_cpu_sync);
struct dt_descriptor {
void *blob;
int frag_id;
+#ifdef CFG_OVERLAY_ADDR
+ int is_overlay;
+#endif
};

static struct dt_descriptor external_dt __nex_bss;
@@ -550,13 +553,17 @@ static void release_external_dt(void)
external_dt.blob = NULL;
}

-#ifdef CFG_EXTERNAL_DTB_OVERLAY
+#if defined(CFG_EXTERNAL_DTB_OVERLAY) || defined(CFG_OVERLAY_ADDR)
static int add_dt_overlay_fragment(struct dt_descriptor *dt, int ioffs)
{
char frag[32];
int offs;
int ret;

+#ifdef CFG_OVERLAY_ADDR
+ if (!dt->is_overlay)
+ return ioffs;
+#endif
snprintf(frag, sizeof(frag), "fragment@%d", dt->frag_id);
offs = fdt_add_subnode(dt->blob, ioffs, frag);
if (offs < 0)
@@ -576,6 +583,10 @@ static int init_dt_overlay(struct dt_descriptor *dt, int __maybe_unused dt_size)
int fragment;
int ret;

+#ifdef CFG_OVERLAY_ADDR
+ return fdt_create_empty_tree(dt->blob, dt_size);
+#endif
+
#ifndef CFG_DT_ADDR
ret = fdt_check_header(dt->blob);
if (!ret) {
@@ -592,6 +603,7 @@ static int init_dt_overlay(struct dt_descriptor *dt, int __maybe_unused dt_size)
#endif
}
#else
+
static int add_dt_overlay_fragment(struct dt_descriptor *dt __unused, int offs)
{
return offs;
@@ -602,7 +614,7 @@ static int init_dt_overlay(struct dt_descriptor *dt __unused,
{
return 0;
}
-#endif /* CFG_EXTERNAL_DTB_OVERLAY */
+#endif /* CFG_EXTERNAL_DTB_OVERLAY || CFG_OVERLAY_ADDR */

static int add_dt_path_subnode(struct dt_descriptor *dt, const char *path,
const char *subnode)
@@ -947,6 +959,9 @@ static void init_external_dt(unsigned long phys_dt)

dt->blob = fdt;

+#ifdef CFG_OVERLAY_ADDR
+ if (dt->is_overlay) {
+#endif
ret = init_dt_overlay(dt, CFG_DTB_MAX_SIZE);
if (ret < 0) {
EMSG("Device Tree Overlay init fail @ 0x%" PRIxPA ": error %d",
@@ -954,6 +969,9 @@ static void init_external_dt(unsigned long phys_dt)
panic();
}

+#ifdef CFG_OVERLAY_ADDR
+ }
+#endif
ret = fdt_open_into(fdt, fdt, CFG_DTB_MAX_SIZE);
if (ret < 0) {
EMSG("Invalid Device Tree at 0x%" PRIxPA ": error %d",
@@ -1073,6 +1091,9 @@ void init_tee_runtime(void)
static void init_primary_helper(unsigned long pageable_part,
unsigned long nsec_entry, unsigned long fdt)
{
+#ifdef CFG_OVERLAY_ADDR
+ struct dt_descriptor *dt = &external_dt;
+#endif
/*
* Mask asynchronous exceptions before switch to the thread vector
* as the thread handler requires those to be masked while
@@ -1091,11 +1112,13 @@ static void init_primary_helper(unsigned long pageable_part,
thread_init_primary(generic_boot_get_handlers());
thread_init_per_cpu();
init_sec_mon(nsec_entry);
+#ifdef CFG_OVERLAY_ADDR
+ dt->is_overlay = 0;
+#endif
init_external_dt(fdt);
discover_nsec_memory();
update_external_dt();
configure_console_from_dt();
-
IMSG("OP-TEE version: %s", core_v_str);

main_init_gic();
@@ -1104,6 +1127,14 @@ static void init_primary_helper(unsigned long pageable_part,
init_tee_runtime();
#endif
release_external_dt();
+#ifdef CFG_OVERLAY_ADDR
+ dt->is_overlay = 1;
+ init_external_dt(CFG_OVERLAY_ADDR);
+ discover_nsec_memory();
+ update_external_dt();
+ release_external_dt();
+#endif
+
#ifdef CFG_VIRTUALIZATION
IMSG("Initializing virtualization support");
core_mmu_init_virtualization();
diff --git a/mk/config.mk b/mk/config.mk
index e446b565..db8ae9f9 100644
--- a/mk/config.mk
+++ b/mk/config.mk
@@ -319,6 +319,10 @@ CFG_DT ?= n
CFG_DTB_MAX_SIZE ?= 0x10000

# Device Tree Overlay support.
+#
+# CASE 1
+# ------
+#
# This define enables support for an OP-TEE provided DTB overlay.
# One of two modes is supported in this case:
# 1. Append OP-TEE nodes to an existing DTB overlay located at CFG_DT_ADDR or
@@ -327,6 +331,22 @@ CFG_DTB_MAX_SIZE ?= 0x10000
# A subsequent boot stage must then merge the generated overlay DTB into a main
# DTB using the standard fdt_overlay_apply() method.
CFG_EXTERNAL_DTB_OVERLAY ?= n
+#
+# CASE 2
+# ------
+# This define enables support for an OP-TEE provided DTB overlay as well as
+# extending a device tree that must be passed as an input parameter.
+# This define is not compatible with CFG_EXTERNAL_DTB_OVERLAY nor
+# CFG_DT_ADDR and a build error should trigger if either of those are enabled
+ifneq ($(strip $(CFG_OVERLAY_ADDR)),)
+ifeq ($(CFG_EXTERNAL_DTB_OVERLAY),y)
+$(error Cannot implement OVERLAY_ADDR and EXTERNAL_DTB_OVERLAY)
+else
+ifneq ($(strip $(CFG_DT_ADDR)),)
+$(error Cannot implement OVERLAY_ADDR and CFG_DT_ADDR)
+endif
+endif
+endif

# Enable core self tests and related pseudo TAs
CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= y
--
2.23.0

2 changes: 2 additions & 0 deletions recipes-security/optee/optee-os_git.bb
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@ DEPENDS = "python-pycrypto-native python3-pyelftools-native"
SRC_URI = "git://github.com/OP-TEE/optee_os.git \
file://0001-allow-setting-sysroot-for-libgcc-lookup.patch \
file://0001-generic_boot-init-new-dtb-if-CFG_DT_ADDR-defined.patch \
file://0001-support-overlay-at-fix-address-and-extend-D.patch \
"

SRC_URI_append_qemuarm64 = " \
Expand All @@ -16,6 +17,7 @@ SRC_URI_append_qemuarm64 = " \
SRC_URI_append_imx = " \
file://0001-Minimal-HUK-implementation-without-full-CAAM-driver.patch \
file://0001-imx-huk-imx7-and-imx7ulp-caam-clock-support.patch \
file://0001-plat-imx-configure-the-SHMEM-section.patch \
"

PV = "3.6.0+git"
Expand Down