implement imul_r16_rm16

evmar · Oct 6, 2024 · 5a81260 · 5a81260
1 parent 8a167cc
commit 5a81260
Show file tree

Hide file tree

Showing 2 changed files with 8 additions and 0 deletions.
diff --git a/x86/src/ops/math.rs b/x86/src/ops/math.rs
@@ -841,6 +841,13 @@ pub fn imul_r32_rm32_imm8(cpu: &mut CPU, mem: Mem, instr: &Instruction) {
     cpu.regs.set32(instr.op0_register(), value as u32);
 }
 
+pub fn imul_r16_rm16(cpu: &mut CPU, mem: Mem, instr: &Instruction) {
+    let x = cpu.regs.get16(instr.op0_register()) as i16;
+    let y = op1_rm16(cpu, mem, instr) as i16;
+    let value = imul_trunc(x, y, &mut cpu.flags);
+    cpu.regs.set16(instr.op0_register(), value as u16);
+}
+
 pub fn idiv_rm32(cpu: &mut CPU, mem: Mem, instr: &Instruction) {
     let x = get_edx_eax(cpu) as i64;
     let y = rm32(cpu, mem, instr).get() as i32 as i64;

diff --git a/x86/src/ops/table.rs b/x86/src/ops/table.rs
@@ -264,6 +264,7 @@ const OP_TAB: [Option<Op>; 2553] = {
     tab[iced_x86::Code::Imul_r32_rm32 as usize] = Some(imul_r32_rm32);
     tab[iced_x86::Code::Imul_r32_rm32_imm32 as usize] = Some(imul_r32_rm32_imm32);
     tab[iced_x86::Code::Imul_r32_rm32_imm8 as usize] = Some(imul_r32_rm32_imm8);
+    tab[iced_x86::Code::Imul_r16_rm16 as usize] = Some(imul_r16_rm16);
     tab[iced_x86::Code::Idiv_rm32 as usize] = Some(idiv_rm32);
     tab[iced_x86::Code::Idiv_rm16 as usize] = Some(idiv_rm16);
     tab[iced_x86::Code::Idiv_rm8 as usize] = Some(idiv_rm8);