Merge pull request #872 from AlbertWinestien/gcolvin-div-cycles

Gcolvin div cycles
ethereum · Feb 14, 2018 · 30aa2b6 · 30aa2b6
2 parents b943077 + 07b0cae
commit 30aa2b6
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/EIPS/eip-EIPS/eip-616.md b/EIPS/eip-EIPS/eip-616.md
@@ -1,5 +1,5 @@
 ```
-EIP: <to be assigned>
+EIP: 616
 Title: SIMD Operations for the EVM
 Author: Greg Colvin, [email protected]
 Type: Standard Track
@@ -125,9 +125,9 @@ operation | cycles | N = 2 | N = 4 | N = 8
 add | 10 _N_ + 6 | 26 | 46 | 86
 subtract | 12 _N_ + 3 |27 | 51 | 99
 multiply | 28 _N_**2 + 11 _N_ + 3 | 137 | 495 |1883
-divide | 30 _N_**2 + 119 _N_ + 111 | 469 | 1067 | 2983
+divide | 15 _N_**2 + 119 _N_ + 111 | 409 | 827 | 2023
 
-The remaining operations are of about the same complexity as addition and subtraction, or less. Given that JUMPDEST is a no-op, and is assigned a gas price of 1, this can be taken as the overhead of the interpreter.  All of the arithmetic operations are assigned the same gas price of 5, for a remaining runtime of 4.  The interpreter loop itself takes about 6 to 8 C instructions, so ADD and SUB are reasonably priced, but MUL is some 5 to 21 times slower than ADD or SUB, and DIV is some 18 to 35 times slower, so they are clearly mispriced.
+The remaining operations are of about the same complexity as addition and subtraction, or less. Given that JUMPDEST is a no-op, and is assigned a gas price of 1, this can be taken as the overhead of the interpreter.  All of the arithmetic operations are assigned the same gas price of 5, for a remaining runtime of 4.  The interpreter loop itself takes about 6 to 8 C instructions, so ADD and SUB are reasonably priced, but MUL is some 5 to 21 times slower than ADD or SUB, and DIV is some 15 to 23 times slower, so they are clearly mispriced.
 
 By comparison, on most [Intel](https://software.intel.com/sites/landingpage/IntrinsicsGuide) and [ARM](https://developer.arm.com/docs/100166_0001/latest/programmers-model/instruction-set-summary/table-of-processor-instructions) SIMD units instructions take approximately the following cycle counts, independent of register width.