cannon: Rework RMW ops for 64-bit compatibility #12419
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mbaxter
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TODO: Fix MIPS 64-bit tests
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Use the status field to track what type of reservation was made.
Codecov ReportAttention: Patch coverage is
Additional details and impacted files@@ Coverage Diff @@
## develop #12419 +/- ##
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+ Coverage 64.60% 64.86% +0.25%
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Files 52 54 +2
Lines 4371 4460 +89
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+ Hits 2824 2893 +69
- Misses 1372 1391 +19
- Partials 175 176 +1
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mbaxter
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Oct 14, 2024
Inphi
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Oct 15, 2024
This reverts commit ce9abdd.
Also, clean-up pc setting
Inphi
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Oct 16, 2024
Co-authored-by: Inphi <[email protected]>
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samlaf
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Nov 10, 2024
) * cannon: Use 4-byte alignment for memory.SetUint32 * cannon: For now, bypass EVM check for 64-bit tests * cannon: Rework rmw ops for Cannon64 compatibility TODO: Fix MIPS 64-bit tests * cannon: Add some comments * cannon: Make TestEVM_MT_LL 64-bit compatible * cannon: Make SC tests 64-bit compatible * cannon: Clean up unused test param * cannon: Add 64-bit tests of ll/sc ops, fix sign extension * cannon: Add tests for lld, scd ops * cannon: Rework test utils * cannon: Update state field LLReservationActive to LLReservationStatus Use the status field to track what type of reservation was made. * cannon: Update MIPS2 version, run semver lock * cannon: Rename go var to match solidity * cannon: Tweak test descriptions * Revert "cannon: Use 4-byte alignment for memory.SetUint32" This reverts commit ce9abdd. * cannon: Rework 64-bit compatibility in tests Also, clean-up pc setting * cannon: Add test cases that clear unaligned LLAddress reservation * Fix testcase descriptions Co-authored-by: Inphi <[email protected]> --------- Co-authored-by: Inphi <[email protected]>
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Description
Rework RMW ops for 64-bit compatibility.
Changes include:
State.LLAddressnow holds the requested address rather than the effective address (which has the lower bits zeroed out). It is necessary to retain some of the less significant bits in order to ensure that LL and SC operations are targeting the same 32-bit value when executing on 64-bit architectures.bool State.LLReservationActivehas been changed touint8 State. LLReservationStatus. This allows us to store the type of reservation that was made (LL operations load a 32-bit value, LLD operations load a 64-bit value) so that the SC (32-bit) and SCD (64-bit) operations only succeed if a matching reservation has been made.Tests
Metadata
Fixes #12242