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Update i2c.c to consider two I2C buses for clear bus counter (IDFGH-5398) #7144
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Fix issue with single bus clear counter but two I2C buses (I2C0, I2C1). The previously implemented single (static) counter would impact the second bus either if one bus has counter expiry.
iltis42
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Update i2c.c
Update i2c.c to consider two I2C buses for clear bus counter
Jun 13, 2021
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Update i2c.c to consider two I2C buses for clear bus counter
Update i2c.c to consider two I2C buses for clear bus counter (IDFGH-5398)
Jun 13, 2021
Thanks for your contribution. |
Any news about this ? |
sha=2cb7ae03072ad7f3f580fee577e626f3c3ef08c8 |
Hi @iltis42 , |
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Status: In Progress
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Status: Done
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Aug 8, 2022
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Aug 9, 2022
Fix issue with single bus clear counter but two I2C buses (I2C0, I2C1). The previously implemented single (static) counter would impact the second bus either if one bus has counter expiry. Merges #7144
Changes merged with 0257eba, thanks for your contribution again. |
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Nov 18, 2022
Fix issue with single bus clear counter but two I2C buses (I2C0, I2C1). The previously implemented single (static) counter would impact the second bus either if one bus has counter expiry. Merges #7144
espressif-bot
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Dec 11, 2022
Fix issue with single bus clear counter but two I2C buses (I2C0, I2C1). The previously implemented single (static) counter would impact the second bus either if one bus has counter expiry. Merges #7144
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PR-Sync-Rebase
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Resolution: Done
Issue is done internally
Status: Done
Issue is done internally
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Fix issue with single bus clear counter but two I2C buses (I2C0, I2C1). The previously implemented single (static) counter would impact the second bus either if one bus has counter expiry.