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s3 version of rmt_reg.h contains conflicting #defines for the RX Limit registers of channels 4-7 (IDFGH-7537) #9100

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HomeSpan opened this issue Jun 4, 2022 · 1 comment
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Resolution: Done Issue is done internally Status: Done Issue is done internally

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@HomeSpan
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HomeSpan commented Jun 4, 2022

The S3 version of rmt_reg.h adds 4 new RX Limit registers: RMT_CH4_RX_LIM_REG, RMT_CH5_RX_LIM_REG, RMT_CH6_RX_LIM_REG, and RMT_CH7_RX_LIM_REG. However, in the code that defines the masks for these registers, the macro names seem to have been mislabeled, which causes duplicate, inconsistent definitions of the _REG macros. For example:

/** RMT_CH4_RX_LIM_REG register
 *  Channel 4 Rx event configuration register
 */
#define RMT_CH4_RX_LIM_REG (DR_REG_RMT_BASE + 0xb0)
/** RMT_CH4_RX_LIM_REG : R/W; bitpos: [8:0]; default: 128;
 *  This register is used to configure the maximum entries that CHANNEL4 can receive.
 */
#define RMT_CH4_RX_LIM_REG    0x000001FFU
#define RMT_CH4_RX_LIM_REG_M  (RMT_CH4_RX_LIM_REG_V << RMT_CH4_RX_LIM_REG_S)
#define RMT_CH4_RX_LIM_REG_V  0x000001FFU
#define RMT_CH4_RX_LIM_REG_S  0

should instead be

/** RMT_CH4_RX_LIM_REG register
 *  Channel 4 Rx event configuration register
 */
#define RMT_CH4_RX_LIM_REG (DR_REG_RMT_BASE + 0xb0)
/** RMT_CH4_RX_LIM_REG : R/W; bitpos: [8:0]; default: 128;
 *  This register is used to configure the maximum entries that CHANNEL4 can receive.
 */
#define RMT_CH4_RX_LIM    0x000001FFU
#define RMT_CH4_RX_LIM_M  (RMT_CH4_RX_LIM_REG_V << RMT_CH4_RX_LIM_REG_S)
#define RMT_CH4_RX_LIM_V  0x000001FFU
#define RMT_CH4_RX_LIM_S  0

Consistent with how all other macros are defined in the file, the suffix "_REG" should not be included on the 4 mask macros definitions. This leads to a redefinition of actual register address, RMT_CH4_RX_LIM_REG (DR_REG_RMT_BASE + 0xb0), with the wrong value (0x000001FFU). In contrast, note how the original TX Limit registers are correctly defined in the file, and the distinction between RMT_CH3_TX_LIM_REG and RMT_CH3_TX_LIM:

/** RMT_CH3_TX_LIM_REG register
 *  Channel 3 Tx event configuration register
 */
#define RMT_CH3_TX_LIM_REG (DR_REG_RMT_BASE + 0xac)
/** RMT_TX_LIM_CH3 : R/W; bitpos: [8:0]; default: 128;
 *  This register is used to configure the maximum entries that CHANNEL3 can send out.
 */
#define RMT_TX_LIM_CH3    0x000001FFU
#define RMT_TX_LIM_CH3_M  (RMT_TX_LIM_CH3_V << RMT_TX_LIM_CH3_S)
#define RMT_TX_LIM_CH3_V  0x000001FFU
#define RMT_TX_LIM_CH3_S  0
@espressif-bot espressif-bot added the Status: Opened Issue is new label Jun 4, 2022
@github-actions github-actions bot changed the title s3 version of rmt_reg.h contains conflicting #defines for the RX Limit registers of channels 4-7 s3 version of rmt_reg.h contains conflicting #defines for the RX Limit registers of channels 4-7 (IDFGH-7537) Jun 4, 2022
@suda-morris
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suda-morris commented Jun 7, 2022

@HomeSpan Thanks for reporting this issue. We will regenerate the register file.

@espressif-bot espressif-bot added Status: In Progress Work is in progress and removed Status: Opened Issue is new labels Jun 7, 2022
@espressif-bot espressif-bot added Resolution: NA Issue resolution is unavailable Status: Done Issue is done internally Resolution: Done Issue is done internally and removed Status: In Progress Work is in progress Resolution: NA Issue resolution is unavailable labels Jun 14, 2022
espressif-bot pushed a commit that referenced this issue Jun 22, 2022
espressif-bot pushed a commit that referenced this issue Jun 26, 2022
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