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gpio: fix issue that gpio cannot hold during deep-sleep on c3, Closes #…
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mythbuster5 committed Aug 25, 2021
1 parent f65c824 commit c860b3e
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Showing 2 changed files with 23 additions and 22 deletions.
1 change: 1 addition & 0 deletions components/hal/esp32c3/include/hal/gpio_ll.h
Original file line number Diff line number Diff line change
Expand Up @@ -334,6 +334,7 @@ static inline void gpio_ll_get_drive_capability(gpio_dev_t *hw, gpio_num_t gpio_
*/
static inline void gpio_ll_deep_sleep_hold_en(gpio_dev_t *hw)
{
CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_FORCE_UNHOLD);
SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M);
}

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44 changes: 22 additions & 22 deletions components/soc/esp32c3/gpio_periph.c
Original file line number Diff line number Diff line change
Expand Up @@ -40,26 +40,26 @@ const uint32_t GPIO_PIN_MUX_REG[SOC_GPIO_PIN_COUNT] = {
};

const uint32_t GPIO_HOLD_MASK[SOC_GPIO_PIN_COUNT] = {
BIT(0), //GPIO0
BIT(1), //GPIO1
BIT(2), //GPIO2
BIT(3), //GPIO3
BIT(4), //GPIO4
BIT(5), //GPIO5
BIT(5), //GPIO6
BIT(6), //GPIO7
BIT(3), //GPIO8
BIT(4), //GPIO9
BIT(0), //GPIO10
BIT(15), //GPIO11
BIT(10), //GPIO12
BIT(12), //GPIO13
BIT(8), //GPIO14
BIT(7), //GPIO15
BIT(9), //GPIO16
BIT(11), //GPIO17
BIT(1), //GPIO18
BIT(2), //GPIO19
BIT(13), //GPIO20
BIT(14), //GPIO21
BIT(0), //GPIO0
BIT(1), //GPIO1
BIT(2), //GPIO2
BIT(3), //GPIO3
BIT(4), //GPIO4
BIT(5), //GPIO5
BIT(6), //GPIO6
BIT(7), //GPIO7
BIT(8), //GPIO8
BIT(9), //GPIO9
BIT(10), //GPIO10
BIT(11), //GPIO11
BIT(12), //GPIO12
BIT(13), //GPIO13
BIT(14), //GPIO14
BIT(15), //GPIO15
BIT(16), //GPIO16
BIT(17), //GPIO17
BIT(18), //GPIO18
BIT(19), //GPIO19
BIT(20), //GPIO20
BIT(21), //GPIO21
};

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