Merge branch 'bugfix/regi2c_ctrl_spinlock_s2' into 'master'

hw_support: fixed regi2c not protected by lock on ESP32S2 See merge request espressif/esp-idf!16653
espressif · Mar 12, 2022 · aab535f · aab535f
2 parents 13fbb4d + d5bdf95
commit aab535f
Showing 69 changed files with 422 additions and 647 deletions.
diff --git a/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld b/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld
@@ -59,6 +59,7 @@ SECTIONS
     *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*)
     *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*)
     *libefuse.a:*.*(.literal .text .literal.* .text.*)
+    *libesp_rom.a:esp_rom_regi2c.*(.literal .text .literal.* .text.*)
     *(.fini.literal)
     *(.fini)
     *(.gnu.version)

diff --git a/components/bootloader_support/src/bootloader_random_esp32c2.c b/components/bootloader_support/src/bootloader_random_esp32c2.c
@@ -10,7 +10,7 @@
 #include "soc/rtc_cntl_reg.h"
 #include "soc/apb_saradc_reg.h"
 #include "soc/system_reg.h"
-#include "regi2c_ctrl.h"
+#include "esp_private/regi2c_ctrl.h"
 
 void bootloader_random_enable(void)
 {

diff --git a/components/bootloader_support/src/bootloader_random_esp32c3.c b/components/bootloader_support/src/bootloader_random_esp32c3.c
@@ -10,7 +10,8 @@
 #include "soc/rtc_cntl_reg.h"
 #include "soc/apb_saradc_reg.h"
 #include "soc/system_reg.h"
-#include "regi2c_ctrl.h"
+#include "esp_private/regi2c_ctrl.h"
+#include "regi2c_saradc.h"
 
 void bootloader_random_enable(void)
 {

diff --git a/components/bootloader_support/src/bootloader_random_esp32h2.c b/components/bootloader_support/src/bootloader_random_esp32h2.c
@@ -10,7 +10,7 @@
 #include "soc/rtc_cntl_reg.h"
 #include "soc/apb_saradc_reg.h"
 #include "soc/system_reg.h"
-#include "regi2c_ctrl.h"
+#include "esp_private/regi2c_ctrl.h"
 
 // ESP32H2-TODO: IDF-3381
 void bootloader_random_enable(void)

diff --git a/components/bootloader_support/src/bootloader_random_esp32s2.c b/components/bootloader_support/src/bootloader_random_esp32s2.c
@@ -13,7 +13,7 @@
 #include "esp_log.h"
 #include "soc/io_mux_reg.h"
 #include "soc/apb_saradc_reg.h"
-#include "regi2c_ctrl.h"
+#include "esp_private/regi2c_ctrl.h"
 #include "hal/adc_ll.h"
 
 #ifndef BOOTLOADER_BUILD

diff --git a/components/bootloader_support/src/bootloader_random_esp32s3.c b/components/bootloader_support/src/bootloader_random_esp32s3.c
@@ -11,7 +11,7 @@
 #include "soc/apb_saradc_reg.h"
 #include "soc/rtc_cntl_reg.h"
 #include "soc/sens_reg.h"
-#include "regi2c_ctrl.h"
+#include "esp_private/regi2c_ctrl.h"
 #include "regi2c_saradc.h"
 
 void bootloader_random_enable(void)

diff --git a/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c b/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c
@@ -32,7 +32,6 @@
 #include "bootloader_clock.h"
 #include "bootloader_flash_config.h"
 #include "bootloader_mem.h"
-#include "regi2c_ctrl.h"
 #include "bootloader_console.h"
 #include "bootloader_flash_priv.h"
 #include "esp_efuse.h"

diff --git a/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c b/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c
@@ -31,7 +31,9 @@
 #include "bootloader_clock.h"
 #include "bootloader_flash_config.h"
 #include "bootloader_mem.h"
-#include "regi2c_ctrl.h"
+#include "esp_private/regi2c_ctrl.h"
+#include "regi2c_lp_bias.h"
+#include "regi2c_bias.h"
 #include "bootloader_console.h"
 #include "bootloader_flash_priv.h"
 #include "bootloader_soc.h"

diff --git a/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c b/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c
@@ -31,7 +31,6 @@
 #include "bootloader_clock.h"
 #include "bootloader_flash_config.h"
 #include "bootloader_mem.h"
-#include "regi2c_ctrl.h"
 #include "bootloader_console.h"
 #include "bootloader_flash_priv.h"
 #include "bootloader_soc.h"

diff --git a/components/driver/rtc_temperature_legacy.c b/components/driver/rtc_temperature_legacy.c
@@ -11,7 +11,8 @@
 #include "esp_log.h"
 #include "esp_check.h"
 #include "soc/rtc_cntl_reg.h"
-#include "regi2c_ctrl.h"
+#include "esp_private/regi2c_ctrl.h"
+#include "regi2c_saradc.h"
 #include "esp_log.h"
 #include "esp_efuse_rtc_calib.h"
 #include "hal/temperature_sensor_ll.h"

diff --git a/components/driver/test/test_adc.c b/components/driver/test/test_adc.c
@@ -398,7 +398,10 @@ TEST_CASE("test_adc_single_cali_time", "[adc][ignore][manual]")
  ********************************************************************************/
 #include <inttypes.h>
 #include "esp_sleep.h"
-#include "regi2c_ctrl.h"
+#include "esp_private/regi2c_ctrl.h"
+#if REGI2C_ANA_CALI_PD_WORKAROUND
+#include "regi2c_saradc.h"
+#endif
 
 //ADC Channels
 #if CONFIG_IDF_TARGET_ESP32

diff --git a/components/esp_hw_support/CMakeLists.txt b/components/esp_hw_support/CMakeLists.txt
@@ -33,7 +33,7 @@ endif()
 
 idf_component_register(SRCS ${srcs}
                        INCLUDE_DIRS include include/soc include/soc/${target}
-                       PRIV_INCLUDE_DIRS port/include
+                       PRIV_INCLUDE_DIRS port/include include/esp_private
                        REQUIRES ${requires}
                        PRIV_REQUIRES "${priv_requires}"
                        LDFRAGMENTS linker.lf)

diff --git a/...s/esp_hw_support/port/esp32/regi2c_ctrl.h → ...support/include/esp_private/regi2c_ctrl.h b/...s/esp_hw_support/port/esp32/regi2c_ctrl.h → ...support/include/esp_private/regi2c_ctrl.h
@@ -1,52 +1,39 @@
 /*
- * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
 #pragma once
 
 #include <stdint.h>
-#include "regi2c_apll.h"
-#include "regi2c_bbpll.h"
+#include "sdkconfig.h"
+#include "esp_rom_regi2c.h"
+#include "soc/regi2c_defs.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-/* Analog function control register */
-#define ANA_CONFIG_REG  0x6000E044
-#define ANA_CONFIG_S    (8)
-#define ANA_CONFIG_M    (0x3FF)
-/* Clear to enable APLL */
-#define I2C_APLL_M      (BIT(14))
-/* Clear to enable BBPLL */
-#define I2C_BBPLL_M     (BIT(17))
-
-/* ROM functions which read/write internal control bus */
-uint8_t rom_i2c_readReg(uint8_t block, uint8_t host_id, uint8_t reg_add);
-uint8_t rom_i2c_readReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb);
-void rom_i2c_writeReg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data);
-void rom_i2c_writeReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data);
 
-#ifdef BOOTLOADER_BUILD
+#define regi2c_read_reg_raw        esp_rom_regi2c_read
+#define regi2c_read_reg_mask_raw   esp_rom_regi2c_read_mask
+#define regi2c_write_reg_raw       esp_rom_regi2c_write
+#define regi2c_write_reg_mask_raw  esp_rom_regi2c_write_mask
+
 
+#ifdef BOOTLOADER_BUILD
 /**
  * If compiling for the bootloader, ROM functions can be called directly,
  * without the need of a lock.
  */
-#define regi2c_ctrl_read_reg         rom_i2c_readReg
-#define regi2c_ctrl_read_reg_mask    rom_i2c_readReg_Mask
-#define regi2c_ctrl_write_reg        rom_i2c_writeReg
-#define regi2c_ctrl_write_reg_mask   rom_i2c_writeReg_Mask
+#define regi2c_ctrl_read_reg         regi2c_read_reg_raw
+#define regi2c_ctrl_read_reg_mask    regi2c_read_reg_mask_raw
+#define regi2c_ctrl_write_reg        regi2c_write_reg_raw
+#define regi2c_ctrl_write_reg_mask   regi2c_write_reg_mask_raw
 
 #else
 
-#define i2c_read_reg_raw        rom_i2c_readReg
-#define i2c_read_reg_mask_raw   rom_i2c_readReg_Mask
-#define i2c_write_reg_raw       rom_i2c_writeReg
-#define i2c_write_reg_mask_raw  rom_i2c_writeReg_Mask
-
 uint8_t regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add);
 uint8_t regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb);
 void regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data);
@@ -69,6 +56,14 @@ void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add,
 #define REGI2C_READ(block, reg_add) \
       regi2c_ctrl_read_reg(block, block##_HOSTID,  reg_add)
 
+/**
+ * Restore regi2c analog calibration related configuration registers.
+ * This is a workaround, and is fixed on later chips
+ */
+#if REGI2C_ANA_CALI_PD_WORKAROUND
+void regi2c_analog_cali_reg_read(void);
+void regi2c_analog_cali_reg_write(void);
+#endif   //#if ADC_CALI_PD_WORKAROUND
 
 #ifdef __cplusplus
 }

diff --git a/components/esp_hw_support/linker.lf b/components/esp_hw_support/linker.lf
@@ -2,8 +2,6 @@
 archive: libesp_hw_support.a
 entries:
     cpu_util (noflash_text)
-    if IDF_TARGET_ESP32S2 = y:
-        regi2c_ctrl (noflash)
     rtc_clk (noflash)
     rtc_init:rtc_vddsdio_set_config (noflash)
     rtc_pm (noflash_text)

diff --git a/components/esp_hw_support/port/esp32/rtc_clk.c b/components/esp_hw_support/port/esp32/rtc_clk.c
@@ -8,9 +8,6 @@
 #include <stdint.h>
 #include <stddef.h>
 #include <stdlib.h>
-#include "esp32/rom/ets_sys.h" // for ets_update_cpu_frequency
-#include "esp32/rom/rtc.h"
-#include "esp_rom_gpio.h"
 #include "soc/rtc.h"
 #include "soc/rtc_periph.h"
 #include "soc/sens_periph.h"
@@ -22,12 +19,19 @@
 #include "soc/gpio_struct.h"
 #include "hal/cpu_hal.h"
 #include "hal/gpio_ll.h"
-#include "esp_rom_sys.h"
-#include "regi2c_ctrl.h"
 #include "esp_hw_log.h"
 #include "sdkconfig.h"
 #include "rtc_clk_common.h"
 
+#include "esp_rom_sys.h"
+#include "esp_rom_gpio.h"
+#include "esp32/rom/ets_sys.h" // for ets_update_cpu_frequency
+#include "esp32/rom/rtc.h"
+
+#include "regi2c_ctrl.h"
+#include "regi2c_apll.h"
+#include "regi2c_bbpll.h"
+
 /* Frequency of the 8M oscillator is 8.5MHz +/- 5%, at the default DCAP setting */
 #define RTC_FAST_CLK_FREQ_8M        8500000
 #define RTC_SLOW_CLK_FREQ_150K      150000

diff --git a/components/esp_hw_support/port/esp32c2/private_include/regi2c_saradc.h b/components/esp_hw_support/port/esp32c2/private_include/regi2c_saradc.h
@@ -77,10 +77,3 @@
 #define I2C_SARADC_TSENS_DAC 0x6
 #define I2C_SARADC_TSENS_DAC_MSB 3
 #define I2C_SARADC_TSENS_DAC_LSB 0
-
-/**
- * Restore regi2c analog calibration related configuration registers.
- * This is a workaround, and is fixed on later chips
- */
-#define REGI2C_ANA_CALI_PD_WORKAROUND    1
-#define REGI2C_ANA_CALI_BYTE_NUM         8
diff --git a/components/esp_hw_support/port/esp32c2/regi2c_ctrl.h b/components/esp_hw_support/port/esp32c2/regi2c_ctrl.h
diff --git a/components/esp_hw_support/port/esp32c2/rtc_clk.c b/components/esp_hw_support/port/esp32c2/rtc_clk.c
@@ -20,6 +20,7 @@
 #include "soc/syscon_reg.h"
 #include "soc/system_reg.h"
 #include "regi2c_ctrl.h"
+#include "regi2c_bbpll.h"
 #include "esp_hw_log.h"
 #include "rtc_clk_common.h"
 #include "esp_rom_sys.h"

diff --git a/components/esp_hw_support/port/esp32c2/rtc_init.c b/components/esp_hw_support/port/esp32c2/rtc_init.c
@@ -15,6 +15,8 @@
 #include "soc/extmem_reg.h"
 #include "soc/system_reg.h"
 #include "regi2c_ctrl.h"
+#include "regi2c_dig_reg.h"
+#include "regi2c_lp_bias.h"
 #include "esp_hw_log.h"
 #include "esp_efuse.h"
 #include "esp_efuse_table.h"

diff --git a/components/esp_hw_support/port/esp32c2/rtc_sleep.c b/components/esp_hw_support/port/esp32c2/rtc_sleep.c
@@ -20,6 +20,8 @@
 #include "esp32c2/rom/ets_sys.h"
 #include "esp32c2/rom/rtc.h"
 #include "regi2c_ctrl.h"
+#include "regi2c_lp_bias.h"
+#include "regi2c_dig_reg.h"
 #include "esp_efuse.h"
 
 /**

diff --git a/components/esp_hw_support/port/esp32c3/private_include/regi2c_saradc.h b/components/esp_hw_support/port/esp32c3/private_include/regi2c_saradc.h
@@ -77,10 +77,3 @@
 #define I2C_SARADC_TSENS_DAC 0x6
 #define I2C_SARADC_TSENS_DAC_MSB 3
 #define I2C_SARADC_TSENS_DAC_LSB 0
-
-/**
- * Restore regi2c analog calibration related configuration registers.
- * This is a workaround, and is fixed on later chips
- */
-#define REGI2C_ANA_CALI_PD_WORKAROUND    1
-#define REGI2C_ANA_CALI_BYTE_NUM         8