ulp: fix incorrect bit-width operator while reading RTC_CNTL_LOW_POWE…

…R_ST_REG during wakeup This commit fixes a bug wherein an incorrect bit-width of 0 was being used while reading the RTC_CNTL_LOW_POWER_ST_REG in ulp_fsm example code while judging whether the system is ready for wakeup. The correct value should be a bit-width of 1 to read bit#27 (RTC_CNTL_MAIN_STATE_IDLE) of the RTC_CNTL_LOW_POWER_ST_REG register on esp32.
espressif · Oct 17, 2022 · a28791d · a28791d
1 parent dc09f30
commit a28791d
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diff --git a/docs/en/api-reference/system/ulp_instruction_set.rst b/docs/en/api-reference/system/ulp_instruction_set.rst
@@ -1001,7 +1001,7 @@ The detailed description of all instructions is presented below:
             // and ULP will not run again until started by the main program.
 
   1: check_wakeup:                        // Read RTC_CNTL_RDY_FOR_WAKEUP and RTC_CNTL_MAIN_STATE_IN_IDLE bit
-            READ_RTC_REG(RTC_CNTL_LOW_POWER_ST_REG, 27, 0)
+            READ_RTC_REG(RTC_CNTL_LOW_POWER_ST_REG, 27, 1)
             MOVE r1, r0                   // Copy result in to r1
             READ_RTC_FIELD(RTC_CNTL_LOW_POWER_ST_REG, RTC_CNTL_RDY_FOR_WAKEUP)
             OR r0, r0, r1

diff --git a/examples/system/ulp_fsm/ulp/main/ulp/wake_up.S b/examples/system/ulp_fsm/ulp/main/ulp/wake_up.S
@@ -14,7 +14,7 @@
 wake_up:
 	/* Check if the system is in sleep mode */
 #if CONFIG_IDF_TARGET_ESP32
-	READ_RTC_REG(RTC_CNTL_LOW_POWER_ST_REG, 27, 0)
+	READ_RTC_REG(RTC_CNTL_LOW_POWER_ST_REG, 27, 1)
 #else
 	READ_RTC_FIELD(RTC_CNTL_LOW_POWER_ST_REG, RTC_CNTL_MAIN_STATE_IN_IDLE)
 #endif