esp32ulp: esp32s2: fix sub_opcode for STO instruction

As per ESP32-S2/S3 Technical Reference Manual, the sub_opcode for Automatic Storage Mode ST-OFFSET should be 3, not 2. See page 35, figure 1-11, of the ESP32-S2 TRM v1.1 (2022-09-23) as well as page 305, figure 2-11, of the ESP32-S3 TRM v1.3 (2023-07-04) Closes #2
espressif · Jan 13, 2024 · dca6dc5 · dca6dc5
1 parent bb3746f
commit dca6dc5
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Showing 3 changed files with 4 additions and 4 deletions.
diff --git a/gas/config/tc-esp32ulp_esp32s2.c b/gas/config/tc-esp32ulp_esp32s2.c
@@ -449,7 +449,7 @@ INSTR_T
 esp32ulp_wr_mem_sto_esp32s2 (Expr_Node * offset)
 {
   int addr_val = EXPR_VALUE (offset);
-  unsigned int local_op = WR_MEM (0, 0, addr_val >> 2, 0, 0, 0, 0x2);
+  unsigned int local_op = WR_MEM (0, 0, addr_val >> 2, 0, 0, 0, 0x3);
 
   return conscode (gencode (local_op),
 		   Expr_Node_Gen_Reloc (offset, BFD_RELOC_ESP32S2ULP_WR_MEM));

diff --git a/gas/testsuite/gas/esp32ulp/esp32s2/compare/esp32s2ulp_st.bin b/gas/testsuite/gas/esp32ulp/esp32s2/compare/esp32s2ulp_st.bin
diff --git a/gas/testsuite/gas/esp32ulp/esp32s2/compare/esp32s2ulp_st.lst b/gas/testsuite/gas/esp32ulp/esp32s2/compare/esp32s2ulp_st.lst
@@ -49,9 +49,9 @@ ESP32ULP GAS  esp32s2ulp_st.s 			page 1
   46 0064 99000062 	        STI   R1, R2, lab1                     // 99000062 
   47 0068 89000062 	        STI   R1, R2, lab2
   48 006c 00000040 	        NOP
-  49 0070 00200064 	        STO   0x20
-  50 0074 00200064 	        STO   offs
-  51 0078 00000064 	        STO   offs2
+  49 0070 00200066 	        STO   0x20
+  50 0074 00200066 	        STO   offs
+  51 0078 00000066 	        STO   offs2
   52 007c 00000040 	        NOP
   53 0080 00000040 	        NOP
   54 0084 00000040 	        NOP