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Reduced GPIO17 (Ethernet clock GPIO) signal strength to reduce noise. #9623
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Reduced Ethernet clock GPIO signal strength to reduce noise.
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Memory usage test (comparing PR against master branch)The table below shows the summary of memory usage change (decrease - increase) in bytes and percentage for each target.
Click to expand the detailed deltas report [usage change in BYTES]
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Hello guys,
Olimex employee here. We received feedback from customers about some noise in Olimex ESP32-GATEWAY design. We did own tests and confirmed there is some noise coming from the GPIO pin we use to feed the clock to the Ethernet. This is GPIO17. It appears all GPIO strength is set to the maximum level 3 - 20mA. Reducing the Ethernet clock GPIO signal strength reduces the noise a lot. There is no benefit for Ethernet clock GPIO to be at max strength for our boards with Ethernet. Reducing the strength of that pin has only benefits for our ESP32-GATEWAY design.
The addition applies only to ESP32-GATEWAY in the folder of its variant we've added a cpp file with GPIO_DRIVE_CAP_0 for GPIO17. Let me know if something is not done properly.
Thanks for your work.