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add i2s peripheral (#203)
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@fimtrey
fimtrey authored Jun 16, 2023
1 parent 7d2722b commit e56e56f
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Showing 44 changed files with 3,192 additions and 119 deletions.
2 changes: 2 additions & 0 deletions core-v-mini-mcu.core
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Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,7 @@ filesets:
- x-heep:obi_spimemio:0.1.0
- x-heep:ip:boot_rom
- x-heep:ip:dma
- x-heep:ip:i2s
- x-heep:ip:power_manager
- x-heep:ip:fast_intr_ctrl
- x-heep:ip:pdm2pcm
Expand Down Expand Up @@ -85,6 +86,7 @@ filesets:
- hw/system/pad_control/pad_control.vlt
- hw/system/x_heep_system.vlt
- hw/simulation/simulation.vlt
- hw/ip/i2s/i2s.vlt
file_type: vlt

rtl-fpga:
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19 changes: 14 additions & 5 deletions hw/core-v-mini-mcu/ao_peripheral_subsystem.sv
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Expand Up @@ -109,6 +109,9 @@ module ao_peripheral_subsystem
output logic uart_intr_rx_timeout_o,
output logic uart_intr_rx_parity_err_o,

// I2s
input logic i2s_rx_valid_i,

// EXTERNAL PERIPH
output reg_req_t ext_peripheral_slave_req_o,
input reg_rsp_t ext_peripheral_slave_resp_i
Expand Down Expand Up @@ -323,11 +326,20 @@ module ao_peripheral_subsystem
.intr_timer_expired_1_0_o(rv_timer_1_intr_o)
);

parameter DMA_TRIGGER_SLOT_NUM = 5;
logic [DMA_TRIGGER_SLOT_NUM-1:0] dma_trigger_slots;
assign dma_trigger_slots[0] = spi_rx_valid;
assign dma_trigger_slots[1] = spi_tx_ready;
assign dma_trigger_slots[2] = spi_flash_rx_valid;
assign dma_trigger_slots[3] = spi_flash_tx_ready;
assign dma_trigger_slots[4] = i2s_rx_valid_i;

dma #(
.reg_req_t (reg_pkg::reg_req_t),
.reg_rsp_t (reg_pkg::reg_rsp_t),
.obi_req_t (obi_pkg::obi_req_t),
.obi_resp_t(obi_pkg::obi_resp_t)
.obi_resp_t(obi_pkg::obi_resp_t),
.SLOT_NUM (DMA_TRIGGER_SLOT_NUM)
) dma_i (
.clk_i,
.rst_ni,
Expand All @@ -337,10 +349,7 @@ module ao_peripheral_subsystem
.dma_master0_ch0_resp_i,
.dma_master1_ch0_req_o,
.dma_master1_ch0_resp_i,
.spi_rx_valid_i(spi_rx_valid),
.spi_tx_ready_i(spi_tx_ready),
.spi_flash_rx_valid_i(spi_flash_rx_valid),
.spi_flash_tx_ready_i(spi_flash_tx_ready),
.trigger_slot_i(dma_trigger_slots),
.dma_intr_o
);

Expand Down
55 changes: 39 additions & 16 deletions hw/core-v-mini-mcu/core_v_mini_mcu.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -114,18 +114,6 @@ module core_v_mini_mcu
input logic gpio_17_i,
output logic gpio_17_oe_o,

output logic gpio_18_o,
input logic gpio_18_i,
output logic gpio_18_oe_o,

output logic gpio_19_o,
input logic gpio_19_i,
output logic gpio_19_oe_o,

output logic gpio_20_o,
input logic gpio_20_i,
output logic gpio_20_oe_o,

output logic spi_flash_sck_o,
input logic spi_flash_sck_i,
output logic spi_flash_sck_oe_o,
Expand Down Expand Up @@ -185,13 +173,34 @@ module core_v_mini_mcu
output logic pdm2pcm_pdm_o,
input logic pdm2pcm_pdm_i,
output logic pdm2pcm_pdm_oe_o,
output logic gpio_21_o,
input logic gpio_21_i,
output logic gpio_21_oe_o,
output logic gpio_18_o,
input logic gpio_18_i,
output logic gpio_18_oe_o,

output logic pdm2pcm_clk_o,
input logic pdm2pcm_clk_i,
output logic pdm2pcm_clk_oe_o,
output logic gpio_19_o,
input logic gpio_19_i,
output logic gpio_19_oe_o,

output logic i2s_sck_o,
input logic i2s_sck_i,
output logic i2s_sck_oe_o,
output logic gpio_20_o,
input logic gpio_20_i,
output logic gpio_20_oe_o,

output logic i2s_ws_o,
input logic i2s_ws_i,
output logic i2s_ws_oe_o,
output logic gpio_21_o,
input logic gpio_21_i,
output logic gpio_21_oe_o,

output logic i2s_sd_o,
input logic i2s_sd_i,
output logic i2s_sd_oe_o,
output logic gpio_22_o,
input logic gpio_22_i,
output logic gpio_22_oe_o,
Expand Down Expand Up @@ -403,6 +412,9 @@ module core_v_mini_mcu
logic uart_intr_rx_timeout;
logic uart_intr_rx_parity_err;

// I2s
logic i2s_rx_valid;

assign intr = {
1'b0, irq_fast, 4'b0, irq_external, 3'b0, rv_timer_intr[0], 3'b0, irq_software, 3'b0
};
Expand Down Expand Up @@ -583,6 +595,7 @@ module core_v_mini_mcu
.uart_intr_rx_break_err_o(uart_intr_rx_break_err),
.uart_intr_rx_timeout_o(uart_intr_rx_timeout),
.uart_intr_rx_parity_err_o(uart_intr_rx_parity_err),
.i2s_rx_valid_i(i2s_rx_valid),
.ext_peripheral_slave_req_o,
.ext_peripheral_slave_resp_i
);
Expand Down Expand Up @@ -624,7 +637,17 @@ module core_v_mini_mcu
.rv_timer_3_intr_o(rv_timer_intr[3]),
.pdm2pcm_clk_o(pdm2pcm_clk_o),
.pdm2pcm_clk_en_o(pdm2pcm_clk_oe_o),
.pdm2pcm_pdm_i(pdm2pcm_pdm_i)
.pdm2pcm_pdm_i(pdm2pcm_pdm_i),
.i2s_sck_o(i2s_sck_o),
.i2s_sck_oe_o(i2s_sck_oe_o),
.i2s_sck_i(i2s_sck_i),
.i2s_ws_o(i2s_ws_o),
.i2s_ws_oe_o(i2s_ws_oe_o),
.i2s_ws_i(i2s_ws_i),
.i2s_sd_o(i2s_sd_o),
.i2s_sd_oe_o(i2s_sd_oe_o),
.i2s_sd_i(i2s_sd_i),
.i2s_rx_valid_o(i2s_rx_valid)
);

assign pdm2pcm_pdm_o = 0;
Expand Down
16 changes: 15 additions & 1 deletion hw/core-v-mini-mcu/core_v_mini_mcu.sv.tpl
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Original file line number Diff line number Diff line change
Expand Up @@ -166,6 +166,9 @@ module core_v_mini_mcu
logic uart_intr_rx_timeout;
logic uart_intr_rx_parity_err;

// I2s
logic i2s_rx_valid;

assign intr = {
1'b0, irq_fast, 4'b0, irq_external, 3'b0, rv_timer_intr[0], 3'b0, irq_software, 3'b0
};
Expand Down Expand Up @@ -344,6 +347,7 @@ module core_v_mini_mcu
.uart_intr_rx_break_err_o(uart_intr_rx_break_err),
.uart_intr_rx_timeout_o(uart_intr_rx_timeout),
.uart_intr_rx_parity_err_o(uart_intr_rx_parity_err),
.i2s_rx_valid_i(i2s_rx_valid),
.ext_peripheral_slave_req_o,
.ext_peripheral_slave_resp_i
);
Expand Down Expand Up @@ -385,7 +389,17 @@ module core_v_mini_mcu
.rv_timer_3_intr_o(rv_timer_intr[3]),
.pdm2pcm_clk_o(pdm2pcm_clk_o),
.pdm2pcm_clk_en_o(pdm2pcm_clk_oe_o),
.pdm2pcm_pdm_i(pdm2pcm_pdm_i)
.pdm2pcm_pdm_i(pdm2pcm_pdm_i),
.i2s_sck_o(i2s_sck_o),
.i2s_sck_oe_o(i2s_sck_oe_o),
.i2s_sck_i(i2s_sck_i),
.i2s_ws_o(i2s_ws_o),
.i2s_ws_oe_o(i2s_ws_oe_o),
.i2s_ws_i(i2s_ws_i),
.i2s_sd_o(i2s_sd_o),
.i2s_sd_oe_o(i2s_sd_oe_o),
.i2s_sd_i(i2s_sd_i),
.i2s_rx_valid_o(i2s_rx_valid)
);

assign pdm2pcm_pdm_o = 0;
Expand Down
36 changes: 36 additions & 0 deletions hw/core-v-mini-mcu/peripheral_subsystem.sv
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Expand Up @@ -59,6 +59,18 @@ module peripheral_subsystem
output logic rv_timer_2_intr_o,
output logic rv_timer_3_intr_o,

//I2s
output logic i2s_sck_o,
output logic i2s_sck_oe_o,
input logic i2s_sck_i,
output logic i2s_ws_o,
output logic i2s_ws_oe_o,
input logic i2s_ws_i,
output logic i2s_sd_o,
output logic i2s_sd_oe_o,
input logic i2s_sd_i,
output logic i2s_rx_valid_o,

// PDM2PCM Interface
output logic pdm2pcm_clk_o,
output logic pdm2pcm_clk_en_o,
Expand Down Expand Up @@ -111,6 +123,7 @@ module peripheral_subsystem
logic i2c_intr_ack_stop;
logic i2c_intr_host_timeout;
logic spi2_intr_event;
logic i2s_intr_event;

// this avoids lint errors
assign unused_irq_id = irq_id;
Expand Down Expand Up @@ -143,6 +156,7 @@ module peripheral_subsystem
assign intr_vector[47] = i2c_intr_ack_stop;
assign intr_vector[48] = i2c_intr_host_timeout;
assign intr_vector[49] = spi2_intr_event;
assign intr_vector[50] = i2s_intr_event;

// External interrupts assignement
for (genvar i = 0; i < NEXT_INT; i++) begin
Expand Down Expand Up @@ -359,4 +373,26 @@ module peripheral_subsystem

assign pdm2pcm_clk_en_o = 1;

i2s #(
.reg_req_t(reg_pkg::reg_req_t),
.reg_rsp_t(reg_pkg::reg_rsp_t)
) i2s_i (
.clk_i,
.rst_ni,
.reg_req_i(peripheral_slv_req[core_v_mini_mcu_pkg::I2S_IDX]),
.reg_rsp_o(peripheral_slv_rsp[core_v_mini_mcu_pkg::I2S_IDX]),

.i2s_sck_o(i2s_sck_o),
.i2s_sck_oe_o(i2s_sck_oe_o),
.i2s_sck_i(i2s_sck_i),
.i2s_ws_o(i2s_ws_o),
.i2s_ws_oe_o(i2s_ws_oe_o),
.i2s_ws_i(i2s_ws_i),
.i2s_sd_o(i2s_sd_o),
.i2s_sd_oe_o(i2s_sd_oe_o),
.i2s_sd_i(i2s_sd_i),
.intr_i2s_event_o(i2s_intr_event),
.i2s_rx_valid_o(i2s_rx_valid_o)
);

endmodule : peripheral_subsystem
53 changes: 53 additions & 0 deletions hw/core-v-mini-mcu/peripheral_subsystem.sv.tpl
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Original file line number Diff line number Diff line change
Expand Up @@ -59,6 +59,18 @@ module peripheral_subsystem
output logic rv_timer_2_intr_o,
output logic rv_timer_3_intr_o,

//I2s
output logic i2s_sck_o,
output logic i2s_sck_oe_o,
input logic i2s_sck_i,
output logic i2s_ws_o,
output logic i2s_ws_oe_o,
input logic i2s_ws_i,
output logic i2s_sd_o,
output logic i2s_sd_oe_o,
input logic i2s_sd_i,
output logic i2s_rx_valid_o,

// PDM2PCM Interface
output logic pdm2pcm_clk_o,
output logic pdm2pcm_clk_en_o,
Expand Down Expand Up @@ -111,6 +123,7 @@ module peripheral_subsystem
logic i2c_intr_ack_stop;
logic i2c_intr_host_timeout;
logic spi2_intr_event;
logic i2s_intr_event;

// this avoids lint errors
assign unused_irq_id = irq_id;
Expand Down Expand Up @@ -143,6 +156,7 @@ module peripheral_subsystem
assign intr_vector[${interrupts["intr_ack_stop"]}] = i2c_intr_ack_stop;
assign intr_vector[${interrupts["intr_host_timeout"]}] = i2c_intr_host_timeout;
assign intr_vector[${interrupts["spi2_intr_event"]}] = spi2_intr_event;
assign intr_vector[${interrupts["i2s_intr_event"]}] = i2s_intr_event;

// External interrupts assignement
for (genvar i = 0; i < NEXT_INT; i++) begin
Expand Down Expand Up @@ -452,4 +466,43 @@ module peripheral_subsystem
assign pdm2pcm_clk_en_o = 1;
% for peripheral in peripherals.items():
% if peripheral[0] in ("i2s"):
% if peripheral[1]['is_included'] in ("yes"):
i2s #(
.reg_req_t(reg_pkg::reg_req_t),
.reg_rsp_t(reg_pkg::reg_rsp_t)
) i2s_i (
.clk_i,
.rst_ni,
.reg_req_i(peripheral_slv_req[core_v_mini_mcu_pkg::I2S_IDX]),
.reg_rsp_o(peripheral_slv_rsp[core_v_mini_mcu_pkg::I2S_IDX]),
.i2s_sck_o(i2s_sck_o),
.i2s_sck_oe_o(i2s_sck_oe_o),
.i2s_sck_i(i2s_sck_i),
.i2s_ws_o(i2s_ws_o),
.i2s_ws_oe_o(i2s_ws_oe_o),
.i2s_ws_i(i2s_ws_i),
.i2s_sd_o(i2s_sd_o),
.i2s_sd_oe_o(i2s_sd_oe_o),
.i2s_sd_i(i2s_sd_i),
.intr_i2s_event_o(i2s_intr_event),
.i2s_rx_valid_o(i2s_rx_valid_o)
);
% else:
assign peripheral_slv_rsp[core_v_mini_mcu_pkg::I2S_IDX] = '0;
assign i2s_sck_oe_o = 1'b0;
assign i2s_sck_o = 1'b0;
assign i2s_ws_oe_o = 1'b0;
assign i2s_ws_o = 1'b0;
assign i2s_sd_oe_o = 1'b0;
assign i2s_sd_o = 1'b0;
assign intr_i2s_event = 1'b0;
assing i2s_rx_valid_o = 1'b0;
% endif
% endif
% endfor
endmodule : peripheral_subsystem
16 changes: 8 additions & 8 deletions hw/fpga/constraints/pynq-z2/pin_assign.xdc
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Original file line number Diff line number Diff line change
Expand Up @@ -60,16 +60,16 @@ set_property -dict {PACKAGE_PIN U7 IOSTANDARD LVCMOS33} [get_ports {gpio_io[11]}
set_property -dict {PACKAGE_PIN V6 IOSTANDARD LVCMOS33} [get_ports {gpio_io[12]}]
set_property -dict {PACKAGE_PIN U13 IOSTANDARD LVCMOS33} [get_ports {gpio_io[13]}]
set_property -dict {PACKAGE_PIN V13 IOSTANDARD LVCMOS33} [get_ports {gpio_io[14]}]
set_property -dict {PACKAGE_PIN Y9 IOSTANDARD LVCMOS33} [get_ports {gpio_io[15]}]
set_property -dict {PACKAGE_PIN A20 IOSTANDARD LVCMOS33} [get_ports {gpio_io[16]}]
set_property -dict {PACKAGE_PIN B19 IOSTANDARD LVCMOS33} [get_ports {gpio_io[17]}]
set_property -dict {PACKAGE_PIN B20 IOSTANDARD LVCMOS33} [get_ports {gpio_io[18]}]
set_property -dict {PACKAGE_PIN P15 IOSTANDARD LVCMOS33} [get_ports {gpio_io[19]}]
set_property -dict {PACKAGE_PIN Y9 IOSTANDARD LVCMOS33} [get_ports {pdm2pcm_clk_io}]
set_property -dict {PACKAGE_PIN A20 IOSTANDARD LVCMOS33} [get_ports {pdm2pcm_pdm_io}]
set_property -dict {PACKAGE_PIN B19 IOSTANDARD LVCMOS33} [get_ports {i2s_sck_io}]
set_property -dict {PACKAGE_PIN B20 IOSTANDARD LVCMOS33} [get_ports {i2s_ws_io}]
set_property -dict {PACKAGE_PIN P15 IOSTANDARD LVCMOS33} [get_ports {i2s_sd_io}]

## Tri-color LD5 for TARGET_PYNQ_Z2
set_property -dict {PACKAGE_PIN M15 IOSTANDARD LVCMOS33} [get_ports {gpio_io[20]}]
set_property -dict {PACKAGE_PIN G14 IOSTANDARD LVCMOS33} [get_ports {pdm2pcm_pdm_io}]
set_property -dict {PACKAGE_PIN L14 IOSTANDARD LVCMOS33} [get_ports {pdm2pcm_clk_io}]
set_property -dict {PACKAGE_PIN M15 IOSTANDARD LVCMOS33} [get_ports {gpio_io[15]}]
set_property -dict {PACKAGE_PIN G14 IOSTANDARD LVCMOS33} [get_ports {gpio_io[16]}]
set_property -dict {PACKAGE_PIN L14 IOSTANDARD LVCMOS33} [get_ports {gpio_io[17]}]

set_property -dict {PACKAGE_PIN W6 IOSTANDARD LVCMOS33} [get_ports {spi2_csb_o[0]}]
set_property -dict {PACKAGE_PIN T15 IOSTANDARD LVCMOS33} [get_ports {spi2_csb_o[1]}]
Expand Down
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