BlackParrot initial commit

w/ Litex BIOS simulation including LiteDRAM
w/ Litex BIOS working on FPGA excluding LiteDRAM

.gitmodules

@@ -25,3 +25,6 @@
 [submodule "litex/soc/cores/cpu/microwatt/sources"]
 	path = litex/soc/cores/cpu/microwatt/sources
 	url = https://github.com/antonblanchard/microwatt
+[submodule "litex/soc/cores/cpu/blackparrot/pre-alpha-release"]
+	path = litex/soc/cores/cpu/blackparrot/pre-alpha-release
+	url = https://github.com/black-parrot/pre-alpha-release.git

litex/build/sim/core/Makefile

@@ -4,8 +4,9 @@ CC = gcc
 CFLAGS = -Wall -$(OPT_LEVEL) -ggdb $(if $(COVERAGE), -DVM_COVERAGE)
 LDFLAGS = -lpthread -ljson-c -lm -lstdc++ -ldl -levent
 
-CC_SRCS ?= "--cc dut.v"
-
+CC_SRCS ?= --cc dut.v
+VV_INPUT_FILE = $(if $(FILE_LIST_PATH), -f $(FILE_LIST_PATH))
+$(info $$FILE_LIST_PATH2 is [${FILE_LIST_PATH2}])
 SRC_DIR ?= .
 INC_DIR ?= .
 MOD_DIR = $(SRC_DIR)/modules
@@ -38,7 +39,8 @@ sim: mkdir $(OBJS_SIM)
 		--unroll-count 256 \
 		$(INC_DIR) \
 		-Wno-BLKANDNBLK \
-		-Wno-WIDTH
+		-Wno-WIDTH  \
+		$(VV_INPUT_FILE)
 	make -j -C $(OBJ_DIR) -f Vdut.mk Vdut
 
 .PHONY: modules

litex/soc/cores/cpu/__init__.py

@@ -33,6 +33,7 @@ class CPUNone(CPU):
 from litex.soc.cores.cpu.minerva import Minerva
 from litex.soc.cores.cpu.rocket import RocketRV64
 from litex.soc.cores.cpu.microwatt import Microwatt
+from litex.soc.cores.cpu.blackparrot import BlackParrotRV64
 
 CPUS = {
     "lm32"       : LM32,
@@ -42,6 +43,7 @@ class CPUNone(CPU):
     "minerva"    : Minerva,
     "rocket"     : RocketRV64,
     "microwatt"  : Microwatt,
+    "blackparrot" : BlackParrotRV64,
 }
 
 # CPU Variants/Extensions Definition ---------------------------------------------------------------

litex/soc/cores/cpu/blackparrot/README.md

@@ -0,0 +1,12 @@
+TODO: Edit
+git submodule update --init --recursive (for blackparrot pre-alpha repo)
+cd pre_alpha_release
+follow getting_started to install blackparrot
+cd ..
+source ./setEnvironment.sh #should be sourced each time you open a terminal or just add this line to bashrc
+Add $BP_TOP/external/bin to $PATH for verilator and riscv-gnu tools
+./update_BP.sh #to modify some of the files in Blackparrot repo (one-time process)
+Currently, we could simulate the LITEX-BIOS on BP processor. 
+
+[![asciicast](https://asciinema.org/a/286568.svg)](https://asciinema.org/a/286568)
+

litex/soc/cores/cpu/blackparrot/__init__.py

@@ -0,0 +1 @@
+from litex.soc.cores.cpu.blackparrot.core import BlackParrotRV64