targets/kc705: revert sys_clk_freq to 150MHz.

enjoy-digital · Nov 2, 2020 · 081d883 · 081d883
1 parent c1c095f
commit 081d883
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/litex/boards/targets/kc705.py b/litex/boards/targets/kc705.py
@@ -48,7 +48,7 @@ def __init__(self, platform, sys_clk_freq):
 # BaseSoC ------------------------------------------------------------------------------------------
 
 class BaseSoC(SoCCore):
-    def __init__(self, sys_clk_freq=int(150e6), with_ethernet=False, with_sata=False, **kwargs):
+    def __init__(self, sys_clk_freq=int(125e6), with_ethernet=False, with_sata=False, **kwargs):
         platform = kc705.Platform()
 
         # SoCCore ----------------------------------------------------------------------------------