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This repository has been archived by the owner on Oct 25, 2021. It is now read-only.
Simon Ser edited this page Sep 30, 2021
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On AMD, the cursor plane needs to be painted onto the underlying primary/overlay planes, thus the blending properties must match (source).
On e.g. RK3399, AFBC is a separate pre-plane decoder stage, with exactly one decoder per CRTC, so whilst every plane can use AFBC, only one plane at a time can use AFBC (source).
On some Arm platforms, there is no fixed number of planes, the number of planes purely depends on the available bandwidth.
On Intel, overlays can only display YUV formats when they have even coordinates.
On Intel, using Y-tiled buffers consumes more bandwidth than other modifiers and may result in black screens (hardware can drive 1 CRTC with a Y-tiled buffer, can drive 2 CRTCs with a linear or X-tiled buffer, but can't drive 2 CRTCs with Y-tiled buffers).