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[RISC-V][JIT] Fix assert on passing double in struct #84584

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Apr 12, 2023
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[RISC-V][JIT] Fix assert on passing double in struct #84584

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8 changes: 6 additions & 2 deletions src/coreclr/jit/scopeinfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -942,7 +942,7 @@ void CodeGen::psiBegProlog()
if (!isStructHandled)
{
#ifdef DEBUG
#ifdef TARGET_LOONGARCH64
#if defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
var_types regType;
if (varTypeIsStruct(lclVarDsc))
{
Expand All @@ -961,19 +961,23 @@ void CodeGen::psiBegProlog()
else
{
regType = compiler->mangleVarArgsType(lclVarDsc->TypeGet());
#ifdef TARGET_LOONGARCH
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@shushanhf shushanhf Apr 21, 2023 •
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@t-mustafin
Please don't destroy the LoongArch64's code.

I revert it by #85151

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@shushanhf My mistake, sorry for that.

if (emitter::isGeneralRegisterOrR0(lclVarDsc->GetArgReg()) && isFloatRegType(regType))
{
// For LoongArch64's ABI, the float args may be passed by integer register.
regType = TYP_LONG;
}
#else // TARGET_RISCV64
// For RV64GC -mabi=lp64d is assumed, so floats are not passed through integer registers.
#endif
}
#else
var_types regType = compiler->mangleVarArgsType(lclVarDsc->TypeGet());
if (lclVarDsc->lvIsHfaRegArg())
{
regType = lclVarDsc->GetHfaType();
}
#endif
#endif // defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
assert(genMapRegNumToRegArgNum(lclVarDsc->GetArgReg(), regType) != (unsigned)-1);
#endif // DEBUG
varLocation.storeVariableInRegisters(lclVarDsc->GetArgReg(), REG_NA);
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