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Update xarch to track more instruction metadata as flags #83473
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Note regarding the This serves as a reminder for when your PR is modifying a ref *.cs file and adding/modifying public APIs, to please make sure the API implementation in the src *.cs file is documented with triple slash comments, so the PR reviewers can sign off that change. |
Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch, @kunalspathak Issue DetailsThis depends on #83354
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…bit encoding and VEX/EVEX support
CC. @dotnet/jit-contrib, @dotnet/avx512-contrib this should be ready for review now. Please see the top post for an explanation of the changes and recommended review process given the first commit is a no-op reordering of instruction entries. |
Hmmm, size is being miscomputed somewhere based on the new metadata, even where it doesn't appear to change the output assembly. Looking... |
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So far, this looks good; will wait till you sort out the failures.
I forgot that |
This allows us to remove several large switch tables and accelerates the general lookup case to help ensure we can easily determine whether a given instruction supports the kmask or other extended SIMD registers in the first place.
I recommend reviewing this with "Hide Whitespace" and commit by commit. The first commit in particular is a no-op and just reorders the instructions (see below) so reviewing by commit allows you to more easily see the actual changes which are just flags additions.
The order of the SIMD instructions was redone to be grouped alphabetically by ISA. This assisted in the ability to find and match things in the architecture manuals for correctness.
We now track whether a given instruction supports the VEX or EVEX encodings.
We also track whether an instruction has an alternative VEX or EVEX instruction with a different encoding and which can therefore support VEX/EVEX but needs specialized handling in codegen or emit to do so.This ended up being very error prone overall and it was overall simpler to just handle the difference in the spot that directly needed it (namely disasm output).We now track whether a given instruction encodes REX.W as
0
,1
, orX
meaning "variable". We also define a helperWIG
flag that has the same value asW0
, but which allows us to easily take advantage of this information in the future if necessary.It's worth noting that for many instructions, they areWe do actually need to trackREX.WIG
for the VEX encoding and may strictly requireREX.W0
orREX.W1
for the EVEX encoding. In such scenarios, the instruction preferenced theREX.W0
orREX.W1
EVEX requirement to simplify things since this will result in a still valid VEX encoding without requiring the specialized handling or another flag to differentiate.REX_W1_EVEX
to ensure that we can still emit the 2-byte VEX encoding when possible when the VEX encoding isWIG