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[LoongArch64] Fix some erros when testing GCstress4. #74469

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merged 1 commit into from
Aug 27, 2022
Merged

[LoongArch64] Fix some erros when testing GCstress4. #74469

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8 changes: 4 additions & 4 deletions src/coreclr/jit/codegenloongarch64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2973,7 +2973,7 @@ void CodeGen::genCodeForCpObj(GenTreeObj* cpObjNode)
{
emitAttr attr0 = emitTypeSize(layout->GetGCPtrType(i + 0));
emitAttr attr1 = emitTypeSize(layout->GetGCPtrType(i + 1));
if (i + 2 >= slots)
if ((i + 2) == slots)
{
attrSrcAddr = EA_8BYTE;
attrDstAddr = EA_8BYTE;
Expand Down Expand Up @@ -3020,7 +3020,7 @@ void CodeGen::genCodeForCpObj(GenTreeObj* cpObjNode)
// Check if the next slot's type is also TYP_GC_NONE and use two ld/sd
if ((i + 1 < slots) && !layout->IsGCPtr(i + 1))
{
if (i + 2 >= slots)
if ((i + 2) == slots)
{
attrSrcAddr = EA_8BYTE;
attrDstAddr = EA_8BYTE;
Expand Down Expand Up @@ -5195,8 +5195,8 @@ void CodeGen::genStackPointerConstantAdjustment(ssize_t spDelta, regNumber regTm
}
else
{
GetEmitter()->emitIns_I_la(EA_PTRSIZE, REG_R21, spDelta);
GetEmitter()->emitIns_R_R_R(INS_add_d, EA_PTRSIZE, REG_SPBASE, REG_SPBASE, REG_R21);
GetEmitter()->emitIns_I_la(EA_PTRSIZE, regTmp, spDelta);
GetEmitter()->emitIns_R_R_R(INS_add_d, EA_PTRSIZE, REG_SPBASE, REG_SPBASE, regTmp);
}
}

Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/jit/targetloongarch64.h
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Original file line number Diff line number Diff line change
Expand Up @@ -169,7 +169,7 @@
#define REG_WRITE_BARRIER_SRC_BYREF REG_T8
#define RBM_WRITE_BARRIER_SRC_BYREF RBM_T8

#define RBM_CALLEE_TRASH_NOGC (RBM_T0|RBM_T1|RBM_T3|RBM_T4|RBM_T6|RBM_T7|RBM_DEFAULT_HELPER_CALL_TARGET)
#define RBM_CALLEE_TRASH_NOGC (RBM_T0|RBM_T1|RBM_T3|RBM_T4|RBM_T7|RBM_DEFAULT_HELPER_CALL_TARGET)

// Registers killed by CORINFO_HELP_ASSIGN_REF and CORINFO_HELP_CHECKED_ASSIGN_REF.
#define RBM_CALLEE_TRASH_WRITEBARRIER (RBM_WRITE_BARRIER_DST|RBM_CALLEE_TRASH_NOGC)
Expand Down