Do not use full memory barrier for osx/arm64 #71026
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ghost
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Tagging subscribers to this area: @dotnet/gc Issue DetailsMacOS M1+ are on Arm v8.5 which has support for atomic instructions, and we don't have to emit full barrier if that is the case. Refereces:
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| __sync_synchronize(); | ||
| #endif | ||
| #else | ||
| // For OSX Arm64, the default Arm architecture is v8.1 which uses atomic instructions that don't need a full barrier. |
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Is the C/C++ compiler guaranteed to use the newer atomic instructions?
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This PR should add an explicit flag for clang to use arm8.1 or e.g. mcpu=apple-m1 Currently, it relies on my observations that by default Clang targets >Arm 8.0 on M1 but if Apple decides to change the default internally we might end up in a situation where these compiler intrinsics will be lowered to 8.0 and without the memory barrier = potential non-reproduceable race conditions somewhere in the vm
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How does passing in mcpu=apple-m1 guarantee that the compiler is only ever use the new instructions?
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LLVM maps apple-m1 to ARMV8_5A as seen in https://github.com/llvm/llvm-project/blob/5ba0a9571b3ee3bc76f65e16549012a440d5a0fb/llvm/include/llvm/Support/AArch64TargetParser.def#L256-L257. However, I think the concern is valid and the full proof way to address it is to check explicitly the way it is done for windows counterpart in #70921. I am working on PR that will add similar check for linux-arm64 (reason stated in #70921 (comment)), so it should take care of these things for osx as well.
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I think inline asm solves all problems here (might be tricky with templates)
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Alternatively we can write a small test that validates that the intrinsic is lowered into LSE 🤷
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I do not think you can reliably test for this. For example, you may see the old instruction only when there is a certain addressing mode needed or only when the code is cold.
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Does it use casal in debug? Can it switch to old LL/SC helper because of register pressure or if the old implementation is one day found faster (it could be).
It feels like inline asm could have more reliable guarantees.
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Replaced by #71512 |
MacOS M1+ are on Arm v8.5 which has support for atomic instructions, and we don't have to emit full barrier if that is the case.
Refereces: