Ensure the size of Vector<T> takes COMPlus_EnableHWIntrinsic into account

[tannergooding]

This replaces #38879, which was saying it had 250 commits

[BruceForstall]

What's the status of this? There are still many failures in the runtime-coreclr jitstress-isas-x86 and runtime-coreclr jitstress-isas-arm pipelines:

https://dev.azure.com/dnceng/public/_build/results?buildId=736993&view=ms.vss-test-web.build-test-results-tab

https://dev.azure.com/dnceng/public/_build/results?buildId=736979&view=ms.vss-test-web.build-test-results-tab

cc @CarolEidt @kunalspathak @echesakovMSFT

[tannergooding]

It looks like the x86 ISA failure is just an issue with Runtime_34587 where something is reporting unsupported when it is expected to be supported.

It resolves the other issues. The ARM failure is an unrelated issue that needs to be fixed as well.

I will try to get a fix up for the Runtime_34587 test so this can be merged

[tannergooding]

Failures look to be unrelated eventpipe failures.

There also looks to still be a failure in Runtime_34587 for the nosimd variant, but I can't get it to repro locally:

Return code:      1
Raw output file:      C:\h\w\95710859\w\ABF209A7\e\JIT\Regression\Reports\JIT.Regression\JitBlue\Runtime_34587\Runtime_34587\Runtime_34587.output.txt
Raw output:
BEGIN EXECUTION
 "C:\h\w\95710859\p\corerun.exe" Runtime_34587.dll 
Supported x86 ISAs:
  AES:           False
  AVX:           False
  AVX2:          False
  BMI1:          True
  BMI2:          True
  FMA:           False
  LZCNT:         True
  PCLMULQDQ:     False
  POPCNT:        True
  SSE:           False
  SSE2:          False
  SSE3:          False
  SSE4.1:        False
  SSE4.2:        False
  SSSE3:         False
Supported x64 ISAs:
  AES.X64:       False
  AVX.X64:       False
  AVX2.X64:      False
  BMI1.X64:      False
  BMI2.X64:      False
  FMA.X64:       False
  LZCNT.X64:     False
  PCLMULQDQ.X64: False
  POPCNT.X64:    False
  SSE.X64:       False
  SSE2.X64:      False
  SSE3.X64:      False
  SSE4.1.X64:    False
  SSE4.2.X64:    False
  SSSE3.X64:     False
Supported Arm ISAs:
  AdvSimd:       False
  Aes:           False
  ArmBase:       False
  Crc32:         False
  Dp:            False
  Rdm:           False
  Sha1:          False
  Sha256:        False
Supported Arm64 ISAs:
  AdvSimd.Arm64: False
  Aes.Arm64:     False
  ArmBase.Arm64: False
  Crc32.Arm64:   False
  Dp.Arm64:      False
  Rdm.Arm64:     False
  Sha1.Arm64:    False
  Sha256.Arm64:  False
Expected: 100
Actual: 0
END EXECUTION - FAILED
FAILED
Test Harness Exitcode is : 1
To run the test:
> set CORE_ROOT=C:\h\w\95710859\p
> C:\h\w\95710859\w\ABF209A7\e\JIT\Regression\JitBlue\Runtime_34587\Runtime_34587\Runtime_34587.cmd
Expected: True
Actual:   False

The log here shows POPCNT is being reported true even though it depends on SSE4.2, so something is misconfigured somewhere outside the VM layer.

[tannergooding]

Ah, it's because POPCNT is a scalar ISA; so it doesn't strictly require SIMD support. That probably needs to be tweaked slightly.

[tannergooding]

@CarolEidt, @echesakovMSFT, @kunalspathak; this should be ready for review/merging and should resolve the x86 issues.

I am still investigating a remaining ARM64 issue and will get a PR up for it separately.

[echesakov]

I am still investigating a remaining ARM64 issue and will get a PR up for it separately.

I will try to take a look tomorrow. Just heads up - there is an issue on Arm64 related to EnableHWIntrinsic=0 (fix in #39753) (in case if you are hitting the same issue)

[tannergooding]

This should still be ready for review/merge. The failures are unrelated eventpipe timeouts that are also failing on other CI.

[kunalspathak]

        return YMM_REGSIZE_BYTES;

do we need similar check here?

---

Refers to: src/coreclr/src/jit/compiler.h:8345 in 21a5a2a. [](commit_id = 21a5a2a, deletion_comment = False)

[tannergooding]

@kunalspathak, I don't believe so; that is not currently under any check other than "IsReadyToRun"; it also has a comment explaining why it differs from maxSIMDStructBytes:

runtime/src/coreclr/src/jit/compiler.h

Lines 8338 to 8346 in 21a5a2a

	if (opts.IsReadyToRun())
	{
	// Return constant instead of maxSIMDStructBytes, as maxSIMDStructBytes performs
	// checks that are effected by the current level of instruction set support would
	// otherwise cause the highest level of instruction set support to be reported to crossgen2.
	// and this api is only ever used as an optimization or assert, so no reporting should
	// ever happen.
	return YMM_REGSIZE_BYTES;
	}

[kunalspathak]

LGTM

[SamMonoRT]

@imhameed fyi