-
Notifications
You must be signed in to change notification settings - Fork 4.8k
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
[LoongArch64] Fix the arithmetic shift right in CodeGen::genSaveCalleeSavedRegistersHelp. #105676
Conversation
…eSavedRegistersHelp.
Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch |
@shushanhf Could you please review this change? |
Is this also applicable to other archs? runtime/src/coreclr/jit/codegenriscv64.cpp Line 214 in 35b94da
|
For loongarch64, callee saved float registers are F24-F31. |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
LGTM
Thanks
It doesn't have real impact here, but using unsigned right shift will make the code more correct for all archs. |
OK, thanks! I've applied it to riscv64 too. |
@jakobbotsch Could you please review this PR? |
No description provided.