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JIT: Port loop cloning to the new loop representation (#95326)
Run the new loop recognition at the same time as old loop recognition and cross validate that the information matches the old loop information. Implement induction analysis on the new representation. Validate that it matches the old loop induction analysis. Add a few quirks to ensure this. Port loop cloning to run on the new loop representation. Add a number of quirks to keep the logic close to the old cloning. One notable difference is that the old loop recognition considers some blocks to be part of the loops that actually are not; for example, blocks that return or break out from the loop are not part of the loop's SCC, but can be part of the lexical range. This means that the old loop cloning will clone those blocks and apply static optimizations to them, while the new loop cloning won't. However, this does not seem to cause a significant number of regressions. A few diffs are expected due to considering fewer blocks to be part of the loop and thus cloning fewer blocks. Also, throughput regressions are expected since we are doing both loop identifications for now. I expect to incrementally work towards replacing everything with the new representation, at which point we can get rid of the old loop identification and hopefully most of the reachability/dominator computations. I expect us to make back the TP at that point.
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