Skip to content

Commit

Permalink
Revert "[JIT] ARM64 - Temporary fix for ldp/stp optimizations (#9…
Browse files Browse the repository at this point in the history
…0534)" (#90699)

This reverts commit 99a60c6.
  • Loading branch information
jkotas authored Aug 16, 2023
1 parent 1b7263e commit ac3246b
Show file tree
Hide file tree
Showing 3 changed files with 0 additions and 80 deletions.
9 changes: 0 additions & 9 deletions src/coreclr/jit/emitarm64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -16615,15 +16615,6 @@ emitter::RegisterOrder emitter::IsOptimizableLdrStrWithPair(
emitAttr prevSize = emitLastIns->idOpSize();
ssize_t prevImm = emitGetInsSC(emitLastIns);

// If we have this format, the 'imm' and/or 'prevImm' are not scaled(encoded),
// therefore we cannot proceed.
// TODO: In this context, 'imm' and 'prevImm' are assumed to be scaled(encoded).
// They should never be scaled(encoded) until its about to be written to the buffer.
if (fmt == IF_LS_2C || lastInsFmt == IF_LS_2C)
{
return eRO_none;
}

// Signed, *raw* immediate value fits in 7 bits, so for LDP/ STP the raw value is from -64 to +63.
// For LDR/ STR, there are 9 bits, so we need to limit the range explicitly in software.
if ((imm < -64) || (imm > 63) || (prevImm < -64) || (prevImm > 63))
Expand Down
63 changes: 0 additions & 63 deletions src/tests/JIT/Regression/JitBlue/Runtime_85765/Runtime_85765.cs

This file was deleted.

This file was deleted.

0 comments on commit ac3246b

Please sign in to comment.