Simplify platform macro definitions in PAL (#73530)

* Simplify platform macro definitions in PAL

* Address CR feedback

* Rename unwinder.cpp to baseunwinder.cpp

* Sync arm64 DAC_CS_NATIVE_DATA_SIZE

src/coreclr/debug/daccess/riscv64/primitives.cpp

@@ -0,0 +1,8 @@
+// Licensed to the .NET Foundation under one or more agreements.
+// The .NET Foundation licenses this file to you under the MIT license.
+
+//
+
+#include "stdafx.h"
+
+#include "../../shared/riscv64/primitives.cpp"

src/coreclr/debug/ee/CMakeLists.txt

@@ -47,22 +47,12 @@ set(CORDBEE_HEADERS_DAC
   ${CORDBEE_HEADERS_DAC_AND_WKS}
 )
 
+list(APPEND CORDBEE_SOURCES_WKS ${ARCH_SOURCES_DIR}/walker.cpp)
+
 if(CLR_CMAKE_TARGET_ARCH_AMD64)
-  list(APPEND CORDBEE_SOURCES_WKS
-    ${ARCH_SOURCES_DIR}/debuggerregdisplayhelper.cpp
-    ${ARCH_SOURCES_DIR}/amd64walker.cpp
-  )
+  list(APPEND CORDBEE_SOURCES_WKS ${ARCH_SOURCES_DIR}/debuggerregdisplayhelper.cpp)
 elseif(CLR_CMAKE_TARGET_ARCH_I386)
-  list(APPEND CORDBEE_SOURCES_WKS
-    ${ARCH_SOURCES_DIR}/debuggerregdisplayhelper.cpp
-    ${ARCH_SOURCES_DIR}/x86walker.cpp
-  )
-elseif(CLR_CMAKE_TARGET_ARCH_ARM)
-  list(APPEND CORDBEE_SOURCES_WKS ${ARCH_SOURCES_DIR}/armwalker.cpp)
-elseif(CLR_CMAKE_TARGET_ARCH_ARM64)
-  list(APPEND CORDBEE_SOURCES_WKS ${ARCH_SOURCES_DIR}/arm64walker.cpp)
-elseif(CLR_CMAKE_TARGET_ARCH_LOONGARCH64)
-  list(APPEND CORDBEE_SOURCES_WKS ${ARCH_SOURCES_DIR}/loongarch64walker.cpp)
+  list(APPEND CORDBEE_SOURCES_WKS ${ARCH_SOURCES_DIR}/debuggerregdisplayhelper.cpp)
 endif()
 
 convert_to_absolute_path(CORDBEE_SOURCES_DAC ${CORDBEE_SOURCES_DAC})

src/coreclr/debug/ee/amd64/amd64walker.cpp → src/coreclr/debug/ee/amd64/walker.cpp

@@ -1,9 +1,7 @@
 // Licensed to the .NET Foundation under one or more agreements.
 // The .NET Foundation licenses this file to you under the MIT license.
-//*****************************************************************************
-// File: Amd64walker.cpp
-//
 
+//*****************************************************************************
 //
 // AMD64 instruction decoding/stepping logic
 //

src/coreclr/debug/ee/arm/armwalker.cpp → src/coreclr/debug/ee/arm/walker.cpp

@@ -1,9 +1,7 @@
 // Licensed to the .NET Foundation under one or more agreements.
 // The .NET Foundation licenses this file to you under the MIT license.
-//*****************************************************************************
-// File: armwalker.cpp
-//
 
+//*****************************************************************************
 //
 // ARM instruction decoding/stepping logic
 //

src/coreclr/debug/ee/arm64/arm64walker.cpp → src/coreclr/debug/ee/arm64/walker.cpp

@@ -1,9 +1,7 @@
 // Licensed to the .NET Foundation under one or more agreements.
 // The .NET Foundation licenses this file to you under the MIT license.
-//*****************************************************************************
-// File: Arm64walker.cpp
-//
 
+//*****************************************************************************
 //
 // ARM64 instruction decoding/stepping logic
 //

src/coreclr/debug/ee/i386/x86walker.cpp → src/coreclr/debug/ee/i386/walker.cpp

@@ -1,9 +1,7 @@
 // Licensed to the .NET Foundation under one or more agreements.
 // The .NET Foundation licenses this file to you under the MIT license.
-//*****************************************************************************
-// File: x86walker.cpp
-//
 
+//*****************************************************************************
 //
 // x86 instruction decoding/stepping logic
 //

src/coreclr/debug/ee/loongarch64/loongarch64walker.cpp → src/coreclr/debug/ee/loongarch64/walker.cpp

@@ -2,9 +2,6 @@
 // The .NET Foundation licenses this file to you under the MIT license.
 
 //*****************************************************************************
-// File: Loongarch64walker.cpp
-//
-
 //
 // LOONGARCH64 instruction decoding/stepping logic
 //

src/coreclr/unwinder/s390x/unwinder_s390x.cpp → src/coreclr/debug/ee/ppc64le/walker.cpp

@@ -1,11 +1,4 @@
 // Licensed to the .NET Foundation under one or more agreements.
 // The .NET Foundation licenses this file to you under the MIT license.
 
-//
-
-#include "stdafx.h"
-#include "utilcode.h"
-#include "crosscomp.h"
-
 #error Unsupported platform
-

src/coreclr/debug/ee/riscv64/dbghelpers.S

@@ -0,0 +1,7 @@
+// Licensed to the .NET Foundation under one or more agreements.
+// The .NET Foundation licenses this file to you under the MIT license.
+
+#include "asmconstants.h"
+#include "unixasmmacros.inc"
+
+#error "TODO-RISCV64: missing implementation"

src/coreclr/debug/ee/riscv64/primitives.cpp

@@ -0,0 +1,10 @@
+// Licensed to the .NET Foundation under one or more agreements.
+// The .NET Foundation licenses this file to you under the MIT license.
+
+//
+
+#include "stdafx.h"
+#include "threads.h"
+#include "../../shared/riscv64/primitives.cpp"
+
+#error "TODO-RISCV64: missing implementation"

src/coreclr/debug/ee/riscv64/walker.cpp

@@ -0,0 +1,19 @@
+// Licensed to the .NET Foundation under one or more agreements.
+// The .NET Foundation licenses this file to you under the MIT license.
+
+//*****************************************************************************
+//
+// RISCV64 instruction decoding/stepping logic
+//
+//*****************************************************************************
+
+#include "stdafx.h"
+#include "walker.h"
+#include "frames.h"
+#include "openum.h"
+
+#ifdef TARGET_RISCV64
+
+#error "TODO-RISCV64: missing implementation"
+
+#endif

src/coreclr/debug/ee/s390x/walker.cpp

@@ -0,0 +1,4 @@
+// Licensed to the .NET Foundation under one or more agreements.
+// The .NET Foundation licenses this file to you under the MIT license.
+
+#error Unsupported platform

src/coreclr/debug/shared/riscv64/primitives.cpp

@@ -0,0 +1,15 @@
+// Licensed to the .NET Foundation under one or more agreements.
+// The .NET Foundation licenses this file to you under the MIT license.
+
+//*****************************************************************************
+// File: primitives.cpp
+//
+
+//
+// Platform-specific debugger primitives
+//
+//*****************************************************************************
+
+#include "primitives.h"
+
+#error "TODO-RISCV64: missing implementation"

src/coreclr/gc/env/gcenv.interlocked.h

@@ -12,7 +12,7 @@ class Interlocked
 private:
 
 #ifndef _MSC_VER
-    static void ArmInterlockedOperationBarrier();
+    static void InterlockedOperationBarrier();
 #endif // !_MSC_VER
 
 public:

src/coreclr/gc/env/gcenv.interlocked.inl

@@ -11,15 +11,12 @@
 #endif // _MSC_VER
 
 #ifndef _MSC_VER
-__forceinline void Interlocked::ArmInterlockedOperationBarrier()
+__forceinline void Interlocked::InterlockedOperationBarrier()
 {
-#ifdef HOST_ARM64
-    // See PAL_ArmInterlockedOperationBarrier() in the PAL
+#if defined(HOST_ARM64) || defined(HOST_LOONGARCH64)
+    // See PAL_InterlockedOperationBarrier() in the PAL
     __sync_synchronize();
-#endif // HOST_ARM64
-#ifdef HOST_LOONGARCH64
-    __sync_synchronize();
-#endif //HOST_LOONGARCH64
+#endif
 }
 #endif // !_MSC_VER
 
@@ -36,7 +33,7 @@ __forceinline T Interlocked::Increment(T volatile *addend)
     return _InterlockedIncrement((long*)addend);
 #else
     T result = __sync_add_and_fetch(addend, 1);
-    ArmInterlockedOperationBarrier();
+    InterlockedOperationBarrier();
     return result;
 #endif
 }
@@ -54,7 +51,7 @@ __forceinline T Interlocked::Decrement(T volatile *addend)
     return _InterlockedDecrement((long*)addend);
 #else
     T result = __sync_sub_and_fetch(addend, 1);
-    ArmInterlockedOperationBarrier();
+    InterlockedOperationBarrier();
     return result;
 #endif
 }
@@ -73,7 +70,7 @@ __forceinline T Interlocked::Exchange(T volatile *destination, T value)
     return _InterlockedExchange((long*)destination, value);
 #else
     T result = __atomic_exchange_n(destination, value, __ATOMIC_ACQ_REL);
-    ArmInterlockedOperationBarrier();
+    InterlockedOperationBarrier();
     return result;
 #endif
 }
@@ -94,7 +91,7 @@ __forceinline T Interlocked::CompareExchange(T volatile *destination, T exchange
     return _InterlockedCompareExchange((long*)destination, exchange, comparand);
 #else
     T result = __sync_val_compare_and_swap(destination, comparand, exchange);
-    ArmInterlockedOperationBarrier();
+    InterlockedOperationBarrier();
     return result;
 #endif
 }
@@ -113,7 +110,7 @@ __forceinline T Interlocked::ExchangeAdd(T volatile *addend, T value)
     return _InterlockedExchangeAdd((long*)addend, value);
 #else
     T result = __sync_fetch_and_add(addend, value);
-    ArmInterlockedOperationBarrier();
+    InterlockedOperationBarrier();
     return result;
 #endif
 }
@@ -126,7 +123,7 @@ __forceinline T Interlocked::ExchangeAdd64(T volatile* addend, T value)
     return _InterlockedExchangeAdd64((int64_t*)addend, value);
 #else
     T result = __sync_fetch_and_add(addend, value);
-    ArmInterlockedOperationBarrier();
+    InterlockedOperationBarrier();
     return result;
 #endif
 }
@@ -144,7 +141,7 @@ __forceinline T Interlocked::ExchangeAddPtr(T volatile* addend, T value)
 #endif
 #else
     T result = __sync_fetch_and_add(addend, value);
-    ArmInterlockedOperationBarrier();
+    InterlockedOperationBarrier();
     return result;
 #endif
 }
@@ -161,7 +158,7 @@ __forceinline void Interlocked::And(T volatile *destination, T value)
     _InterlockedAnd((long*)destination, value);
 #else
     __sync_and_and_fetch(destination, value);
-    ArmInterlockedOperationBarrier();
+    InterlockedOperationBarrier();
 #endif
 }
 
@@ -177,7 +174,7 @@ __forceinline void Interlocked::Or(T volatile *destination, T value)
     _InterlockedOr((long*)destination, value);
 #else
     __sync_or_and_fetch(destination, value);
-    ArmInterlockedOperationBarrier();
+    InterlockedOperationBarrier();
 #endif
 }
 
@@ -198,7 +195,7 @@ __forceinline T Interlocked::ExchangePointer(T volatile * destination, T value)
 #endif
 #else
     T result = (T)(TADDR)__atomic_exchange_n((void* volatile *)destination, value, __ATOMIC_ACQ_REL);
-    ArmInterlockedOperationBarrier();
+    InterlockedOperationBarrier();
     return result;
 #endif
 }
@@ -214,7 +211,7 @@ __forceinline T Interlocked::ExchangePointer(T volatile * destination, std::null
 #endif
 #else
     T result = (T)(TADDR)__atomic_exchange_n((void* volatile *)destination, value, __ATOMIC_ACQ_REL);
-    ArmInterlockedOperationBarrier();
+    InterlockedOperationBarrier();
     return result;
 #endif
 }
@@ -238,7 +235,7 @@ __forceinline T Interlocked::CompareExchangePointer(T volatile *destination, T e
 #endif
 #else
     T result = (T)(TADDR)__sync_val_compare_and_swap((void* volatile *)destination, comparand, exchange);
-    ArmInterlockedOperationBarrier();
+    InterlockedOperationBarrier();
     return result;
 #endif
 }
@@ -254,7 +251,7 @@ __forceinline T Interlocked::CompareExchangePointer(T volatile *destination, T e
 #endif
 #else
     T result = (T)(TADDR)__sync_val_compare_and_swap((void* volatile *)destination, (void*)comparand, (void*)exchange);
-    ArmInterlockedOperationBarrier();
+    InterlockedOperationBarrier();
     return result;
 #endif
 }

src/coreclr/inc/crosscomp.h

@@ -554,7 +554,7 @@ typedef struct _T_KNONVOLATILE_CONTEXT_POINTERS {
 #elif defined(TARGET_LINUX) && defined(TARGET_ARM)
 #define DAC_CS_NATIVE_DATA_SIZE 80
 #elif defined(TARGET_LINUX) && defined(TARGET_ARM64)
-#define DAC_CS_NATIVE_DATA_SIZE 116
+#define DAC_CS_NATIVE_DATA_SIZE 104
 #elif defined(TARGET_LINUX) && defined(TARGET_LOONGARCH64)
 #define DAC_CS_NATIVE_DATA_SIZE 96
 #elif defined(TARGET_LINUX) && defined(TARGET_X86)

src/coreclr/jit/hashbv.h

@@ -4,7 +4,7 @@
 #ifndef HASHBV_H
 #define HASHBV_H
 
-#if defined(_M_AMD64) || defined(_M_X86)
+#if defined(HOST_AMD64) || defined(HOST_X86)
 #include <xmmintrin.h>
 #endif
 

src/coreclr/nativeaot/Runtime/arm64/AsmMacros.h

@@ -249,7 +249,7 @@ __SECTIONREL_tls_CurrentThread SETS "$__SECTIONREL_tls_CurrentThread":CC:"_"
 ;;
 
     MACRO
-        ArmInterlockedOperationBarrier
+        InterlockedOperationBarrier
 
         dmb         ish
     MEND

src/coreclr/nativeaot/Runtime/arm64/Interlocked.S

@@ -20,7 +20,7 @@ ALTERNATE_ENTRY RhpLockCmpXchg32AVLocation
     cbnz    w9, 1b
 
 2: // exit
-    ArmInterlockedOperationBarrier
+    InterlockedOperationBarrier
     ret
 LEAF_END RhpLockCmpXchg32, _TEXT
 
@@ -40,6 +40,6 @@ ALTERNATE_ENTRY RhpLockCmpXchg64AVLocation
     stlxr   w9, x1, [x8]    // if (x0 == x2) { try *x8 = x1 and goto loop if failed or goto exit }
     cbnz    w9, 1b
 2: // exit
-    ArmInterlockedOperationBarrier
+    InterlockedOperationBarrier
     ret
 LEAF_END RhpLockCmpXchg64, _TEXT

src/coreclr/nativeaot/Runtime/arm64/Interlocked.asm

@@ -22,7 +22,7 @@
         cbnz    w9, %bt1
 
 2   ;; exit
-        ArmInterlockedOperationBarrier
+        InterlockedOperationBarrier
         ret
     LEAF_END RhpLockCmpXchg32
 
@@ -43,7 +43,7 @@
         cbnz    w9, %bt1
 
 2   ;; exit
-        ArmInterlockedOperationBarrier
+        InterlockedOperationBarrier
         ret
     LEAF_END RhpLockCmpXchg64
 

src/coreclr/nativeaot/Runtime/arm64/WriteBarriers.S

@@ -270,7 +270,7 @@ CmpXchgRetry:
 CmpXchgNoUpdate:
         // x10 still contains the original value.
         mov     x0, x10
-        ArmInterlockedOperationBarrier
+        InterlockedOperationBarrier
         ret     lr
 
     LEAF_END RhpCheckedLockCmpXchg, _TEXT
@@ -311,7 +311,7 @@ ExchangeRetry:
 
         // x10 still contains the original value.
         mov     x0, x10
-        ArmInterlockedOperationBarrier
+        InterlockedOperationBarrier
         ret
 
     LEAF_END RhpCheckedXchg, _TEXT