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[LoongArch64] fix the conflicts within the DIV/MOD. (#86289)
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shushanhf authored May 16, 2023
1 parent b54f978 commit 16a851d
Showing 1 changed file with 5 additions and 5 deletions.
10 changes: 5 additions & 5 deletions src/coreclr/jit/codegenloongarch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2646,9 +2646,9 @@ void CodeGen::genCodeForDivMod(GenTreeOp* tree)
if ((exSetFlags & ExceptionSetFlags::ArithmeticException) != ExceptionSetFlags::None)
{
// Check if the divisor is not -1 branch to 'sdivLabel'
emit->emitIns_R_R_I(INS_addi_d, EA_PTRSIZE, REG_SCRATCH, REG_R0, -1);
emit->emitIns_R_R_I(INS_addi_d, EA_PTRSIZE, REG_R21, REG_R0, -1);
BasicBlock* sdivLabel = genCreateTempLabel(); // can optimize for loongarch64.
emit->emitIns_J_cond_la(INS_bne, sdivLabel, REG_SCRATCH, divisorReg);
emit->emitIns_J_cond_la(INS_bne, sdivLabel, REG_R21, divisorReg);

// If control flow continues past here the 'divisorReg' is known to be -1
regNumber dividendReg = tree->gtGetOp1()->GetRegNum();
Expand All @@ -2660,15 +2660,15 @@ void CodeGen::genCodeForDivMod(GenTreeOp* tree)
if (size == EA_4BYTE)
{
// MinInt=0x80000000
emit->emitIns_R_R_I(INS_slli_w, EA_4BYTE, REG_SCRATCH, REG_SCRATCH, 31);
emit->emitIns_R_R_I(INS_slli_w, EA_4BYTE, REG_R21, REG_R21, 31);
}
else
{
assert(size == EA_8BYTE);
// MinInt=0x8000000000000000
emit->emitIns_R_R_I(INS_slli_d, EA_8BYTE, REG_SCRATCH, REG_SCRATCH, 63);
emit->emitIns_R_R_I(INS_slli_d, EA_8BYTE, REG_R21, REG_R21, 63);
}
genJumpToThrowHlpBlk_la(SCK_ARITH_EXCPN, INS_beq, REG_SCRATCH, nullptr, dividendReg);
genJumpToThrowHlpBlk_la(SCK_ARITH_EXCPN, INS_beq, REG_R21, nullptr, dividendReg);
genDefineTempLabel(sdivLabel);
}

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