Rename ifdefs to match CoreCLR (#8142)

src/Native/Bootstrap/main.cpp

@@ -236,7 +236,7 @@ Object * __load_string_literal(const char * string)
     return pString;
 }
 
-#if defined(_WASM_)
+#if defined(HOST_WASM)
 // Exception wrapper type that allows us to differentiate managed and native exceptions
 class ManagedExceptionWrapper : exception
 {
@@ -253,7 +253,7 @@ class ManagedExceptionWrapper : exception
 
 extern "C" void RhpThrowEx(void * pEx)
 {
-#if defined(_WASM_)
+#if defined(HOST_WASM)
     throw ManagedExceptionWrapper(pEx);
 #else 
     throw "RhpThrowEx";
@@ -265,7 +265,7 @@ extern "C" void RhpThrowHwEx()
     throw "RhpThrowHwEx";
 }
 
-#if defined(_WASM_)
+#if defined(HOST_WASM)
 // returns the Leave target
 extern "C" uint32_t LlvmCatchFunclet(void * exceptionObj, void* pHandlerIP, void* pvRegDisplay); 
 extern "C" uint32_t LlvmCatchFuncletGeneric(void * exceptionObj, void* pHandlerIP, void* pvRegDisplay, void * genericContext); 
@@ -295,7 +295,7 @@ extern "C" void* RhpCallFilterFunclet(void*, void*, void*)
 }
 #endif
 
-#if defined(_WASM_)
+#if defined(HOST_WASM)
 extern "C" void LlvmFinallyFunclet(void *finallyHandler, void *shadowStack);
 extern "C" void RhpCallFinallyFunclet(void *finallyHandler, void *shadowStack)
 {
@@ -394,7 +394,7 @@ static int InitializeRuntime()
     if (!RhInitialize())
         return -1;
 
-#if defined(CPPCODEGEN) || defined(_WASM_)
+#if defined(CPPCODEGEN) || defined(HOST_WASM)
     RhpEnableConservativeStackReporting();
 #endif // CPPCODEGEN
 
@@ -414,7 +414,7 @@ static int InitializeRuntime()
 
 #ifndef CPPCODEGEN
     InitializeModules(osModule, __modules_a, (int)((__modules_z - __modules_a)), (void **)&c_classlibFunctions, _countof(c_classlibFunctions));
-#elif defined _WASM_
+#elif defined HOST_WASM
     InitializeModules(nullptr, (void**)RtRHeaderWrapper(), 1, (void **)&c_classlibFunctions, _countof(c_classlibFunctions));
 #else // !CPPCODEGEN
     InitializeModules(nullptr, (void**)RtRHeaderWrapper(), 2, (void **)&c_classlibFunctions, _countof(c_classlibFunctions));

src/Native/CMakeLists.txt

@@ -29,30 +29,27 @@ endfunction()
 
 if(CLR_CMAKE_TARGET_ARCH STREQUAL x64)
     set(CLR_CMAKE_PLATFORM_ARCH_AMD64 1)
-    add_definitions(-D_TARGET_AMD64_=1)
-    add_definitions(-D_AMD64_)
-    add_definitions(-DBIT64=1)
+    add_definitions(-DTARGET_AMD64=1)
+    add_definitions(-DHOST_AMD64=1)
+    add_definitions(-DHOST_64BIT=1)
 elseif(CLR_CMAKE_TARGET_ARCH MATCHES "^(arm|armel)$")
     set(CLR_CMAKE_PLATFORM_ARCH_ARM 1)
-    add_definitions(-D_TARGET_ARM_=1)
-    add_definitions(-D_ARM_)
-    add_definitions(-DBIT32=1)
+    add_definitions(-DTARGET_ARM=1)
+    add_definitions(-DHOST_ARM=1)
     add_definitions(-DFEATURE_64BIT_ALIGNMENT=1)
 elseif(CLR_CMAKE_TARGET_ARCH STREQUAL arm64)
     set(CLR_CMAKE_PLATFORM_ARCH_ARM64 1)
-    add_definitions(-D_TARGET_ARM64_=1)
-    add_definitions(-D_ARM64_)
-    add_definitions(-DBIT64=1)
+    add_definitions(-DTARGET_ARM64=1)
+    add_definitions(-DHOST_ARM64=1)
+    add_definitions(-DHOST_64BIT=1)
 elseif(CLR_CMAKE_TARGET_ARCH STREQUAL x86)
     set(CLR_CMAKE_PLATFORM_ARCH_I386 1)
-    add_definitions(-D_TARGET_X86_=1)
-    add_definitions(-D_X86_)
-    add_definitions(-DBIT32=1)
+    add_definitions(-DTARGET_X86=1)
+    add_definitions(-DHOST_X86=1)
 elseif(CLR_CMAKE_TARGET_ARCH STREQUAL wasm)
     set(CLR_CMAKE_PLATFORM_ARCH_WASM 1)
-    add_definitions(-D_TARGET_WASM_=1)
-    add_definitions(-D_WASM_)
-    add_definitions(-DBIT32=1)
+    add_definitions(-DTARGET_WASM=1)
+    add_definitions(-DHOST_WASM=1)
 else()
     clr_unknown_arch()
 endif()
@@ -86,7 +83,8 @@ endif(CMAKE_SYSTEM_NAME STREQUAL Emscripten)
 if (CLR_CMAKE_PLATFORM_UNIX)
     include_directories(inc/unix)
 
-    add_definitions(-DPLATFORM_UNIX=1)
+    add_definitions(-DHOST_UNIX=1)
+    add_definitions(-DTARGET_UNIX=1)
     add_definitions(-DPAL_STDCPP_COMPAT)
 
     # All warnings that are not explicitly disabled are reported as errors

src/Native/ObjWriter/cordebuginfo.h

@@ -69,7 +69,7 @@ class ICorDebugInfo
     // contained in debug/inc/DbgIPCEvents.h.
     enum RegNum
     {
-#ifdef _TARGET_X86_
+#ifdef TARGET_X86
         REGNUM_EAX,
         REGNUM_ECX,
         REGNUM_EDX,
@@ -78,7 +78,7 @@ class ICorDebugInfo
         REGNUM_EBP,
         REGNUM_ESI,
         REGNUM_EDI,
-#elif _TARGET_ARM_
+#elif TARGET_ARM
         REGNUM_R0,
         REGNUM_R1,
         REGNUM_R2,
@@ -95,7 +95,7 @@ class ICorDebugInfo
         REGNUM_SP,
         REGNUM_LR,
         REGNUM_PC,
-#elif _TARGET_ARM64_
+#elif TARGET_ARM64
         REGNUM_X0,
         REGNUM_X1,
         REGNUM_X2,
@@ -129,7 +129,7 @@ class ICorDebugInfo
         REGNUM_LR,
         REGNUM_SP,
         REGNUM_PC,
-#elif _TARGET_AMD64_
+#elif TARGET_AMD64
         REGNUM_RAX,
         REGNUM_RCX,
         REGNUM_RDX,
@@ -153,18 +153,18 @@ class ICorDebugInfo
         REGNUM_AMBIENT_SP, // ambient SP support. Ambient SP is the original SP in the non-BP based frame.
                            // Ambient SP should not change even if there are push/pop operations in the method.
 
-#ifdef _TARGET_X86_
+#ifdef TARGET_X86
         REGNUM_FP = REGNUM_EBP,
         REGNUM_SP = REGNUM_ESP,
-#elif _TARGET_AMD64_
+#elif TARGET_AMD64
         REGNUM_SP = REGNUM_RSP,
-#elif _TARGET_ARM_
+#elif TARGET_ARM
 #ifdef REDHAWK
         REGNUM_FP = REGNUM_R7,
 #else
         REGNUM_FP = REGNUM_R11,
 #endif //REDHAWK
-#elif _TARGET_ARM64_
+#elif TARGET_ARM64
         //Nothing to do here. FP is already alloted.
 #else
         // RegNum values should be properly defined for this platform

src/Native/ObjWriter/jitDebugInfo.h

@@ -2,7 +2,7 @@
 #define JIT_DEBUG_INFO_H
 
 typedef unsigned int DWORD;
-#define _TARGET_AMD64_ 1
+#define TARGET_AMD64 1
 
 #include "cordebuginfo.h"
 #include "cvconst.h"

src/Native/ObjWriter/objwriter.h

@@ -34,11 +34,11 @@ using namespace llvm::codeview;
 // ***
 // Define default call conventions
 // ***
-#if defined(_X86_) && !defined(PLATFORM_UNIX)
+#if defined(HOST_X86) && !defined(HOST_UNIX)
 #define STDMETHODCALLTYPE  __stdcall
 #else
 #define STDMETHODCALLTYPE
-#endif //  defined(_X86_) && !defined(PLATFORM_UNIX)
+#endif //  defined(HOST_X86) && !defined(HOST_UNIX)
 
 enum CustomSectionAttributes : int32_t {
   CustomSectionAttributes_ReadOnly = 0x0000,

src/Native/Runtime/AsmOffsets.h

@@ -8,7 +8,7 @@
 
 // You must #define PLAT_ASM_OFFSET and PLAT_ASM_SIZEOF before you #include this file
 
-#ifdef BIT64
+#ifdef HOST_64BIT
 #define ASM_OFFSET(offset32, offset64, cls, member) PLAT_ASM_OFFSET(offset64, cls, member)
 #define ASM_SIZEOF(sizeof32, sizeof64, cls        ) PLAT_ASM_SIZEOF(sizeof64, cls)
 #define ASM_CONST(const32, const64, expr)           PLAT_ASM_CONST(const64, expr)
@@ -47,7 +47,7 @@ ASM_OFFSET(   2c,    40, Thread, m_pTransitionFrame)
 ASM_OFFSET(   30,    48, Thread, m_pHackPInvokeTunnel)
 ASM_OFFSET(   40,    68, Thread, m_ppvHijackedReturnAddressLocation)
 ASM_OFFSET(   44,    70, Thread, m_pvHijackedReturnAddress)
-#ifdef BIT64
+#ifdef HOST_64BIT
 ASM_OFFSET(    0,    78, Thread, m_uHijackedReturnValueFlags)
 #endif
 ASM_OFFSET(   48,    80, Thread, m_pExInfoStackHead)
@@ -60,7 +60,7 @@ ASM_OFFSET(    4,     8, gc_alloc_context, alloc_limit)
 
 #ifdef FEATURE_CACHED_INTERFACE_DISPATCH
 ASM_OFFSET(    4,     8, InterfaceDispatchCell, m_pCache)
-#ifndef BIT64
+#ifndef HOST_64BIT
 ASM_OFFSET(    8,     0, InterfaceDispatchCache, m_pCell)
 #endif
 ASM_OFFSET(   10,    20, InterfaceDispatchCache, m_rgEntries)

src/Native/Runtime/CachedInterfaceDispatch.cpp

@@ -86,7 +86,7 @@ static void * UpdatePointerPairAtomically(void * pPairLocation,
                                           void * pSecondPointer,
                                           bool fFailOnNonNull)
 {
-#if defined(BIT64)
+#if defined(HOST_64BIT)
     // The same comments apply to the AMD64 version. The CompareExchange looks a little different since the
     // API was refactored in terms of Int64 to avoid creating a 128-bit integer type.
 
@@ -129,7 +129,7 @@ static void * UpdatePointerPairAtomically(void * pPairLocation,
     // The update failed due to a racing update to the same location. Return the new value of the second
     // pointer (either a new cache that lost the race or a non-NULL pointer in the cache entry update case).
     return pSecondPointer;
-#endif // BIT64
+#endif // HOST_64BIT
 }
 
 // Helper method for updating an interface dispatch cache entry atomically. See comments by the usage of
@@ -186,12 +186,12 @@ static InterfaceDispatchCache * UpdateCellStubAndCache(InterfaceDispatchCell * p
 // any more) we can place them on one of several free lists based on their size.
 //
 
-#if defined(_AMD64_) || defined(_ARM64_)
+#if defined(HOST_AMD64) || defined(HOST_ARM64)
 
 // Head of the list of discarded cache blocks that can't be re-used just yet.
 InterfaceDispatchCache * g_pDiscardedCacheList; // for AMD64 and ARM64, m_pCell is not used and we can link the discarded blocks themselves
 
-#else // defined(_AMD64_) || defined(_ARM64_)
+#else // defined(HOST_AMD64) || defined(HOST_ARM64)
 
 struct DiscardedCacheBlock
 {
@@ -205,7 +205,7 @@ static DiscardedCacheBlock * g_pDiscardedCacheList = NULL;
 // Free list of DiscardedCacheBlock items
 static DiscardedCacheBlock * g_pDiscardedCacheFree = NULL;
 
-#endif // defined(_AMD64_) || defined(_ARM64_)
+#endif // defined(HOST_AMD64) || defined(HOST_ARM64)
 
 // Free lists for each cache size up to the maximum. We allocate from these in preference to new memory.
 static InterfaceDispatchCache * g_rgFreeLists[CID_MAX_CACHE_SIZE_LOG2 + 1];
@@ -350,13 +350,13 @@ static void DiscardCache(InterfaceDispatchCache * pCache)
 
     CrstHolder lh(&g_sListLock);
 
-#if defined(_AMD64_) || defined(_ARM64_)
+#if defined(HOST_AMD64) || defined(HOST_ARM64)
 
     // on AMD64 and ARM64, we can thread the list through the blocks directly
     pCache->m_pNextFree = g_pDiscardedCacheList;
     g_pDiscardedCacheList = pCache;
 
-#else // defined(_AMD64_) || defined(_ARM64_)
+#else // defined(HOST_AMD64) || defined(HOST_ARM64)
 
     // on other architectures, we cannot overwrite pCache->m_pNextFree yet
     // because it shares storage with m_pCell which may still be used as a back
@@ -376,7 +376,7 @@ static void DiscardCache(InterfaceDispatchCache * pCache)
 
         g_pDiscardedCacheList = pDiscardedCacheBlock;
     }
-#endif // defined(_AMD64_) || defined(_ARM64_)
+#endif // defined(HOST_AMD64) || defined(HOST_ARM64)
 }
 
 // Called during a GC to empty the list of discarded caches (which we can now guarantee aren't being accessed)
@@ -386,7 +386,7 @@ void ReclaimUnusedInterfaceDispatchCaches()
     // No need for any locks, we're not racing with any other threads any more.
 
     // Walk the list of discarded caches.
-#if defined(_AMD64_) || defined(_ARM64_)
+#if defined(HOST_AMD64) || defined(HOST_ARM64)
 
     // on AMD64, this is threaded directly through the cache blocks
     InterfaceDispatchCache * pCache = g_pDiscardedCacheList;
@@ -404,7 +404,7 @@ void ReclaimUnusedInterfaceDispatchCaches()
         pCache = pNextCache;
     }
 
-#else // defined(_AMD64_) || defined(_ARM64_)
+#else // defined(HOST_AMD64) || defined(HOST_ARM64)
 
     // on other architectures, we use an auxiliary list instead
     DiscardedCacheBlock * pDiscardedCacheBlock = g_pDiscardedCacheList;
@@ -426,7 +426,7 @@ void ReclaimUnusedInterfaceDispatchCaches()
         pDiscardedCacheBlock = pNextDiscardedCacheBlock;
     }
 
-#endif // defined(_AMD64_) || defined(_ARM64_)
+#endif // defined(HOST_AMD64) || defined(HOST_ARM64)
 
     // We processed all the discarded entries, so we can simply NULL the list head.
     g_pDiscardedCacheList = NULL;
@@ -496,11 +496,11 @@ COOP_PINVOKE_HELPER(PTR_Code, RhpUpdateDispatchCellCache, (InterfaceDispatchCell
     if (InterfaceDispatchCell::IsCache(newCacheValue))
     {
         pCache = (InterfaceDispatchCache*)newCacheValue;
-#if !defined(_AMD64_) && !defined(_ARM64_)
+#if !defined(HOST_AMD64) && !defined(HOST_ARM64)
         // Set back pointer to interface dispatch cell for non-AMD64 and non-ARM64
         // for AMD64 and ARM64, we have enough registers to make this trick unnecessary
         pCache->m_pCell = pCell;
-#endif // !defined(_AMD64_) && !defined(_ARM64_)
+#endif // !defined(HOST_AMD64) && !defined(HOST_ARM64)
 
         // Add entry to the first unused slot.
         InterfaceDispatchCacheEntry * pCacheEntry = &pCache->m_rgEntries[cOldCacheEntries];

src/Native/Runtime/CachedInterfaceDispatch.h

@@ -35,7 +35,7 @@ struct InterfaceDispatchCache
     union
     {
         InterfaceDispatchCache *    m_pNextFree;    // next in free list
-#ifndef _AMD64_
+#ifndef HOST_AMD64
         InterfaceDispatchCell  *    m_pCell;        // pointer back to interface dispatch cell - not used for AMD64
 #endif
     };