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[Arm64] JIT generate LSE Atomics #18130
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When ARMv8.1 LSE Atomics are available, use them to implement Interlocked operations.
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All 22 checks passed. Merge conflict with #18267 forced a rebase. ping @briansull @BruceForstall @CarolEidt @dotnet/jit-contrib |
mikedn
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Jun 7, 2018
| getEmitter()->emitIns_R_R_R(INS_swpal, dataSize, dataReg, targetReg, addrReg); | ||
| break; | ||
| case GT_XADD: | ||
| if ((targetReg == REG_NA) || (targetReg == REG_ZR)) |
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Looks like staddl is the arm64 equivalent of x64's lock add. If you want to support this you need to generate GT_LOCKADD in lowering like it is done on x64. See #18267
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If the result is not used, it certainly could be REG_NA/REG_ZR. I doubt lsra and/or lowering will generate this case yet.
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Before the rebase this used to include GT_LOCKADD. I will look at #18267
briansull
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@briansull you approved this; can it be merged? |
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…e-LSE-Atomics [Arm64] JIT generate LSE Atomics Commit migrated from dotnet/coreclr@6154222
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When ARMv8.1 LSE Atomics are available, use them to implement
Interlocked operations.
@briansull @BruceForstall @CarolEidt @dotnet/jit-contrib