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Add HardwareIntrinsics AVX-512 info #2412
Add HardwareIntrinsics AVX-512 info #2412
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The other main path is an
if/else if
pattern.This new code will yield/return several AVX-512F ISAs and not in their reverse hierarchical order. -- It is also missing the
AVX512VL
ISA, which is nested under the respective classes (its one flag shared across all, but dependent on the containing class also being supported).Is that intentional?
I'd imagine we want to cover
Avx512F
in the main if/else chain and the others to be on top to be "inline" with how the other works.Notably certain combinations also have well-defined names and it may be "better" to list the well-known name to avoid a list that is 20 ISAs long.
That is,
x86-64-v4
is the formal definition that includesAVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL
x86-64-v3
isAVX, AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, OSXSAVE
x86-64-v2
isCMPXCHG16B, POPCNT, SSE3, SSE4.1, SSE4.2, SSSE3
x86-64-v1
(baseline) isCMOV, CX8, x87FPU, FXSR, MMX, OSFXSR, SCE, SSE, SSE2
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I probably argue against using
x86-x64-v?
since it not immediately obvious what's what.Instead perhaps we could list it as
AVX-512(X/Y/Z)
e.g.AVX-512(F/BW/CD/DQ/VL)
. This makes set obvious and immediately visible.