Jit: Flush registers used in memory breakpoint conditions #13245
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…utine The next commit will add another piece of code that depends on this assumption that we've been making. Good opportunity to document it. In practice, all callers of EmitBackpatchRoutine are locking X30.
Aims to fix https://bugs.dolphin-emu.org/issues/13686. I'm using a less efficient approach for Jit64 than for JitArm64. In JitArm64, I'm flushing in the slow access code, but in Jit64, I'm flushing before the split between the slow access code and the fast access code, because Jit64 doesn't keep register mappings around for when it's time to emit the slow access code. But the flushing code is only emitted when there are memory breakpoints with conditions, so I'd say that this is a performance loss we can live with.
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Aims to fix https://bugs.dolphin-emu.org/issues/13686.
I'm using a less efficient approach for Jit64 than for JitArm64. In JitArm64, I'm flushing in the slow access code, but in Jit64, I'm flushing before the split between the slow access code and the fast access code, because Jit64 doesn't keep register mappings around for when it's time to emit the slow access code. But the flushing code is only emitted when there are memory breakpoints with conditions, so I'd say that this is a performance loss we can live with.