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Accelerate AddTakeGrad + Support Sorting #153

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merged 1 commit into from
Jul 16, 2016

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  1. Add range operation to MShadow, which is similar to python's range
  2. Accelerate the original AddTakeGrad using Torch's kernel, the backward pass of embedding layer will be much faster. Slow speed of the AddTakeGradKernel in embedding layer apache/mxnet#2612. I will make a PR to the MXNet side once it's merged.
  3. Add two sort functions: SortByKey and VectorizedSort. The GPU side is implemented using Thrust. Also, sorting for half_t is currently not implemented. May add later.

@@ -6,6 +6,11 @@
*/
#ifndef MSHADOW_CUDA_TENSOR_GPU_INL_CUH_
#define MSHADOW_CUDA_TENSOR_GPU_INL_CUH_
#include <thrust/device_ptr.h>
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Is thrust installed with cuda by default? Does this complicate compiling and linking? Do we need to update config and cmake?

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Yes, thrust is included in cuda toolkit. Also, since it's a template library, there is no need to install. http://docs.nvidia.com/cuda/thrust/#axzz4EPrET26A . (I find that thrust has been added to CUDA toolkit long ago, maybe since CUDA 5 -- http://developer.download.nvidia.com/compute/cuda/5_0/rel/docs/CUDA_Toolkit_Release_Notes_And_Errata.txt).

Revise type of RangeExp

Add repeat option to range

Add new backward kernel for embedding + Add sort functions.

Fix format

Fix header

Fix Lint + Doc

Turn off the sorting support for CUDA < 7.0
@sxjscience sxjscience force-pushed the acc_addgrad_add_sort branch from 9b12a5c to 32ffa76 Compare July 15, 2016 15:10
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@piiswrong I choose to use LOG(FATAL) finally.

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@piiswrong Is it OK to merge now?

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