Merge pull request #145 from shattered/_cdd6c115

partial register cache invalidation
davidgiven · May 22, 2024 · 5b32e41 · 5b32e41
2 parents b45aca0 + 74eee5a
commit 5b32e41
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Showing 6 changed files with 10 additions and 0 deletions.
diff --git a/src/cowbe/arch6303.cow.ng b/src/cowbe/arch6303.cow.ng
@@ -328,6 +328,7 @@
             when REG_IMM:
                 RegCacheLeavesConstant(srcreg, operand.imm.value as uint16);
             when REG_MEM:
+                RegCacheFlushValue(operand.mem.sym, operand.mem.off);
                 RegCacheLeavesValue(srcreg, operand.mem.sym, operand.mem.off);
         end case;
     end sub;

diff --git a/src/cowbe/arch6502.cow.ng b/src/cowbe/arch6502.cow.ng
@@ -1418,6 +1418,7 @@ gen STORE1(a:lhs, DEREF1(ptrs)) uses y
 
 gen STORE1(a|x|y:lhs, DEREF1(ADDRESS():a))
 {
+    RegCacheFlushValue(&$a.sym, $a.off);
     E_st($lhs);
     E_symref(&$a.sym, $a.off);
     E_nl();

diff --git a/src/cowbe/arch80386.cow.ng b/src/cowbe/arch80386.cow.ng
@@ -217,6 +217,7 @@
 	end sub;
 
 	sub E_store(reg: RegId, sym: [Symbol], off: Size, index: RegId) is
+		RegCacheFlushValue(sym, off);
 		E_mov(reg);
 		E_reg(reg);
 		E(", (");

diff --git a/src/cowbe/archpdp11.cow.ng b/src/cowbe/archpdp11.cow.ng
@@ -221,6 +221,7 @@
 	end sub;
 
 	sub E_store(reg: RegId, sym: [Symbol], off: Size, byte: uint8) is
+		RegCacheFlushValue(sym, off);
 		E_mov(reg);
 		E_reg(reg);
 		E(", ");

diff --git a/src/cowbe/archz80.cow.ng b/src/cowbe/archz80.cow.ng
@@ -341,6 +341,7 @@
 	end sub;
 
 	sub E_store16(src: RegId, sym: [Symbol], off: Size) is
+		RegCacheFlushValue(sym, off);
 		E("\tld (");
 		E_symref(sym, off);
 		E("), ");
@@ -1199,6 +1200,7 @@ gen STORE4(r32:val, DEREF4(ADD2(ix|iy:ptr, CONSTANT(value is indexable_32bit):c)
 
 gen STORE4(r32:val, DEREF4(ADDRESS():a))
 {
+	RegCacheFlushValue(&$a.sym, $a.off);
 	E_store16(wordreg($val), &$a.sym, $a.off);
 	E_exx();
 	E_store16(wordreg($val), &$a.sym, $a.off+2);

diff --git a/src/cowbe/codegen.coh b/src/cowbe/codegen.coh
@@ -129,6 +129,10 @@ sub FindLast(inreg: RegId): (outreg: RegId) is
 	end loop;
 end sub;
 
+sub RegCacheFlushValue(sym: [Symbol], off: Size) is
+    RegCacheFlush(FindConflictingRegisters(RegCacheFindValue(sym, off)));
+end sub;
+
 sub FindBitNumber(reg: RegId): (bit: uint8) is
 	bit := 0;
 	while reg != 0 loop