[Build] Prevent a collision with 6.11 kernel macro WRMSRNS

cyring · Sep 19, 2024 · 4515f5d · 4515f5d
1 parent 92ff25b
commit 4515f5d
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Showing 2 changed files with 4 additions and 4 deletions.
diff --git a/x86_64/corefreq-cli-json.c b/x86_64/corefreq-cli-json.c
@@ -952,7 +952,7 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
 					json_key(&s, "LKGS");
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.ExtFeature_Leaf1_EAX.LKGS);
 					json_key(&s, "WRMSRNS");
-					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.ExtFeature_Leaf1_EAX.WRMSRNS);
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.ExtFeature_Leaf1_EAX.WRMSRNS_Inst);
 					json_key(&s, "AMX_FP16");
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.ExtFeature_Leaf1_EAX.AMX_FP16);
 					json_key(&s, "HRESET");
@@ -962,7 +962,7 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
 					json_key(&s, "LAM");
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.ExtFeature_Leaf1_EAX.LAM);
 					json_key(&s, "RDMSRLIST");
-					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.ExtFeature_Leaf1_EAX.RDMSRLIST);
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.ExtFeature_Leaf1_EAX.RDMSRLIST_Inst);
 
 					json_end_object(&s);
 				}

diff --git a/x86_64/coretypes.h b/x86_64/coretypes.h
@@ -1468,14 +1468,14 @@ typedef struct	/* Extended Feature Flags Enumeration Leaf 1		*/
 		Reserved3	: 17-13,
 		FRED		: 18-17, /* Flexible Return and Event Delivery*/
 		LKGS		: 19-18, /* Load Kernel GS segment register */
-		WRMSRNS 	: 20-19, /* Sierra Forest, Grand Ridge	*/
+		WRMSRNS_Inst	: 20-19, /* Sierra Forest, Grand Ridge	*/
 		NMI_SRC 	: 21-20, /* NMI-source reporting	*/
 		AMX_FP16	: 22-21, /* Granite Rapids		*/
 		HRESET		: 23-22, /* History Reset instruction	*/
 		AVX_IFMA	: 24-23, /* Sierra Forest, Grand Ridge	*/
 		Reserved4	: 26-24,
 		LAM		: 27-26, /* Linear Address Masking	*/
-		RDMSRLIST	: 28-27, /* Sierra Forest, Grand Ridge	*/
+		RDMSRLIST_Inst	: 28-27, /* Sierra Forest, Grand Ridge	*/
 		Reserved5	: 30-28,
 		INVD_DISABLE	: 31-30,
 		Reserved6	: 32-31;