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With calyxir/calyx#1145 merged, Calyx has basic support for memories with non-combinational reads. We should change the Calyx backend for Dahlia to generate these sequential read memories instead of the default memories. There are a couple of challenges with doing this:
We probably need to address #384. This is because the pass currently generates a bunch of code that all assigns to the addr0 signal of the memory and reads from the out port. However, with sequential reads, there is no guarantee when a particular read will appear and it is doubly dubious to be assigning to the same ports of the memory.
We should probably switch to a "prime-and-read" model of reading memories: one group is responsible for "priming" the read from a memory by setting the read_en signal and waiting for read_done. Since the memory registers the last address, the next group can just read from the memory's out port.
One thing to be careful about is that if there ever a write_en between the read_en and use of out, the value on out will be invalidated. However, I think Dahlia's guarantees will make sure this doesn't happen.
The text was updated successfully, but these errors were encountered:
rachitnigam
changed the title
[Calyx] Generated non-combinational reads for memories
[Calyx] Generate non-combinational reads for memories
Aug 19, 2022
With calyxir/calyx#1145 merged, Calyx has basic support for memories with non-combinational reads. We should change the Calyx backend for Dahlia to generate these sequential read memories instead of the default memories. There are a couple of challenges with doing this:
We probably need to address #384. This is because the pass currently generates a bunch of code that all assigns to the
addr0
signal of the memory and reads from theout
port. However, with sequential reads, there is no guarantee when a particular read will appear and it is doubly dubious to be assigning to the same ports of the memory.We should probably switch to a "prime-and-read" model of reading memories: one group is responsible for "priming" the read from a memory by setting the
read_en
signal and waiting forread_done
. Since the memory registers the last address, the next group can just read from the memory'sout
port.One thing to be careful about is that if there ever a
write_en
between theread_en
and use ofout
, the value onout
will be invalidated. However, I think Dahlia's guarantees will make sure this doesn't happen.The text was updated successfully, but these errors were encountered: