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Add deep support for the Hitachi 28-Byte A/C Protocol #563

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merged 4 commits into from
Nov 4, 2018
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Experimental IRHitachiAc class.

  • Limited to basic functions.
  • Unit tests
  • Update IRrecvDumpV2 to reflect improvements.

Note: We incorrectly (historically) have Hitachi as MSB First bit ordering, it's really in LSBF order.
Due to legacy usage, we'll keep the sending routines and array data in MSBF and reverse bits as needed.

Fixes #417
Fixes #453

Add deep support for the Hitachi 28-Byte A/C Protocol.

Ref: #417 #453
* Limit fan speed when in certain modes.
* More unit test coverage.
@crankyoldgit crankyoldgit self-assigned this Oct 28, 2018
@crankyoldgit crankyoldgit added the Hacktoberfest Hacktoberfest participation label Oct 31, 2018
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Reached the 7 day review limit without any negative comments. Merging.

@crankyoldgit crankyoldgit merged commit 9a5e2ae into master Nov 4, 2018
@crankyoldgit crankyoldgit deleted the hitachi branch November 17, 2018 02:34
crankyoldgit added a commit that referenced this pull request Nov 23, 2018
**[Features]**
- Add deep support for the Hitachi 28-Byte A/C Protocol (#563)
- Deep decoding for Whirlpool A/C (#572)
- Improve security options for IRMQTTServer example. (#575)
- Require a changed firmware password before upload. (#576)

**[Misc]**
- Add missing '}' in output of Auto analyse. (#562)
- Make A/C example code a bit more simple. (#571)
@crankyoldgit crankyoldgit mentioned this pull request Nov 23, 2018
crankyoldgit added a commit that referenced this pull request Nov 23, 2018
**[Features]**
- Add deep support for the Hitachi 28-Byte A/C Protocol (#563)
- Deep decoding for Whirlpool A/C (#572)
- Improve security options for IRMQTTServer example. (#575)
- Require a changed firmware password before upload. (#576)

**[Misc]**
- Add missing `}` in output of Auto analyse. (#562)
- Make A/C example code a bit more simple. (#571)
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