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Store anode wire hits in ALCT (ACLUT-3) #30301

Merged
merged 2 commits into from
Jul 27, 2020
Merged

Store anode wire hits in ALCT (ACLUT-3) #30301

merged 2 commits into from
Jul 27, 2020

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dildick
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@dildick dildick commented Jun 19, 2020

PR description:

This PR stores the anode wire hits in the ALCT data format, so one can do detailed studies of the performance of the ALCT algorithm for Run-3 or Phase-2 (e.g. displaced muons, close-by muons, hadronic showers,...). It also allows for new logic to be developed aimed at enhancing the ALCT position resolution for Phase-2.

The PR is similar to #29233, and builds on top of #30104 (which has yet to be merged).

PR validation:

Tested with WF 20434.0 and on 100 single muon gun events

cmsDriver.py Configuration/Generator/python/SingleMuPt10_pythia8_cfi.py \
--fileout file:step1.root --mc \
--eventcontent FEVTDEBUG --datatier GEN-SIM --conditions auto:phase1_2021_realistic \
--beamspot Run3RoundOptics25ns13TeVLowSigmaZ --step GEN,SIM --geometry DB:Extended \
--era Run3 --python_filename SingleMu_GEN_SIM.py --no_exec   -n 10

cmsDriver.py step2.py --filein file:step1.root --fileout file:step2.root --mc \
--eventcontent FEVTDEBUG --datatier GEN-SIM-DIGI-L1 --conditions auto:phase1_2021_realistic \
--step DIGI:pdigi_valid,L1 --geometry DB:Extended \
--era Run3 --python_filename step2_DIGI_L1.py --no_exec   -n 10

Somewhat verbose output of the simulation of a single pattern that ultimately produced an ALCT can be found below.

Finding pattern
Layer 1
	Wire 0, valid, wireN 93, OK in pattern
	Wire 1, valid, wireN 92, OK in pattern, HIT!
	Wire 2, valid, wireN 91, OK in pattern, HIT!
	Wire 3
	Wire 4
Layer 2
	Wire 0
	Wire 1, valid, wireN 92, OK in pattern
	Wire 2, valid, wireN 91, OK in pattern, HIT!
	Wire 3
	Wire 4
Layer 3
	Wire 0
	Wire 1
	Wire 2, valid, wireN 91, OK in pattern, HIT!
	Wire 3
	Wire 4
Layer 4
	Wire 0
	Wire 1
	Wire 2, valid, wireN 91, OK in pattern
	Wire 3, valid, wireN 90, OK in pattern, HIT!
	Wire 4
Layer 5
	Wire 0
	Wire 1
	Wire 2, valid, wireN 91, OK in pattern
	Wire 3, valid, wireN 90, OK in pattern, HIT!
	Wire 4, valid, wireN 89, OK in pattern, HIT!
Layer 6
	Wire 0
	Wire 1
	Wire 2, valid, wireN 91, OK in pattern
	Wire 3, valid, wireN 90, OK in pattern
	Wire 4, valid, wireN 89, OK in pattern, HIT!

Printing hits for keyWire 91 bx 8
Layer 1
	92	91
Layer 2
	91
Layer 3
	91
Layer 4
	90
Layer 5
	90	89
Layer 6
	89

if this PR is a backport please specify the original PR and why you need to backport that PR:

N/A

@tahuang1991

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The code-checks are being triggered in jenkins.

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+code-checks

Logs: https://cmssdt.cern.ch/SDT/code-checks/cms-sw-PR-30301/16261

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A new Pull Request was created by @dildick (Sven Dildick) for master.

It involves the following packages:

L1Trigger/CSCCommonTrigger
L1Trigger/CSCTriggerPrimitives

@cmsbuild, @rekovic, @benkrikler can you please review it and eventually sign? Thanks.
@Martin-Grunewald, @ptcox, @valuev this is something you requested to watch as well.
@silviodonato, @dpiparo you are the release manager for this.

cms-bot commands are listed here

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dildick commented Jun 25, 2020

@rekovic Can you run the tests, please?

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please test

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cmsbuild commented Jun 30, 2020

The tests are being triggered in jenkins.

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+1
Tested at: 316ff47
https://cmssdt.cern.ch/SDT/jenkins-artifacts/pull-request-integration/PR-160efd/7536/summary.html
CMSSW: CMSSW_11_2_X_2020-06-30-1100
SCRAM_ARCH: slc7_amd64_gcc820

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Comparison job queued.

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Comparison is ready
https://cmssdt.cern.ch/SDT/jenkins-artifacts/pull-request-integration/PR-160efd/7536/summary.html

Comparison Summary:

  • No significant changes to the logs found
  • Reco comparison results: 0 differences found in the comparisons
  • DQMHistoTests: Total files compared: 36
  • DQMHistoTests: Total histograms compared: 2778915
  • DQMHistoTests: Total failures: 1
  • DQMHistoTests: Total nulls: 0
  • DQMHistoTests: Total successes: 2778864
  • DQMHistoTests: Total skipped: 50
  • DQMHistoTests: Total Missing objects: 0
  • DQMHistoSizes: Histogram memory added: 0.0 KiB( 35 files compared)
  • Checked 152 log files, 16 edm output root files, 36 DQM output files

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@rekovic, can you please check and eventually sign?

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rekovic commented Jul 7, 2020

+1

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cmsbuild commented Jul 21, 2020

The tests are being triggered in jenkins.

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+1
Tested at: 20851ca
https://cmssdt.cern.ch/SDT/jenkins-artifacts/pull-request-integration/PR-160efd/8177/summary.html
CMSSW: CMSSW_11_2_X_2020-07-21-1100
SCRAM_ARCH: slc7_amd64_gcc820

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Comparison job queued.

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Comparison is ready
https://cmssdt.cern.ch/SDT/jenkins-artifacts/pull-request-integration/PR-160efd/8177/summary.html

Comparison Summary:

  • No significant changes to the logs found
  • Reco comparison results: 0 differences found in the comparisons
  • DQMHistoTests: Total files compared: 34
  • DQMHistoTests: Total histograms compared: 2525996
  • DQMHistoTests: Total failures: 1
  • DQMHistoTests: Total nulls: 0
  • DQMHistoTests: Total successes: 2525948
  • DQMHistoTests: Total skipped: 47
  • DQMHistoTests: Total Missing objects: 0
  • DQMHistoSizes: Histogram memory added: 0.0 KiB( 33 files compared)
  • Checked 144 log files, 17 edm output root files, 34 DQM output files

@silviodonato
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ping @rekovic

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merge
@rekovic signed before the conflict #30301 (comment)

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rekovic commented Jul 28, 2020

+1

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This pull request is fully signed and it will be integrated in one of the next master IBs (tests are also fine). This pull request will be automatically merged.

@@ -295,6 +295,11 @@ void CSCAnodeLCTProcessor::run(const std::vector<int> wire[CSCConstants::NUM_LAY
// Take the best MAX_CLCTS_PER_PROCESSOR candidates per bx.
int ALCTIndex_[CSCConstants::MAX_ALCT_TBINS] = {};

// define a new pattern map
// for each key half strip, and for each pattern, store the 2D collection of fired comparator digis
std::map<int, std::map<int, CSCCLCTDigi::ComparatorContainer>> hits_in_patterns;
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so this is a map of a map of a vector of vectors?

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@davidlange6 So the type needs to be corrected (#30940), but it shouldn't have any effect. ComparatorContainer and WireContainer are both 2D vectors.

Yes, it maps wiregroups and pattern numbers onto 2D vectors with hits.

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dildick commented Jul 28, 2020

Hold. Not sure how CSCCLCTDigi::ComparatorContainer got in CSCALCTProcessor. That needs to be fixed.

@dildick dildick deleted the from-CMSSW_11_2_X_2020-06-18-1100-Store-anode-wire-hits-in-ALCT branch August 2, 2020 01:30
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6 participants