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add a ticl_v5 variant for the phase-2 HLT timing menu workflow
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mmusich committed Sep 26, 2024
1 parent 468f19e commit 05f11eb
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Original file line number Diff line number Diff line change
Expand Up @@ -2051,6 +2051,15 @@ def condition(self, fragment, stepList, key, hasHarvest):
'--procModifiers': 'alpaka'
}

upgradeWFs['HLTTiming75e33TiclV5'] = deepcopy(upgradeWFs['HLTTiming75e33'])
upgradeWFs['HLTTiming75e33TiclV5'].suffix = '_HLT75e33TimingTiclV5'
upgradeWFs['HLTTiming75e33TiclV5'].offset = 0.752
upgradeWFs['HLTTiming75e33TiclV5'].step2 = {
'-s':'DIGI:pdigi_valid,L1TrackTrigger,L1,L1P2GT,DIGI2RAW,HLT:75e33_timing',
'--procModifiers': 'ticl_v5'
}


class UpgradeWorkflow_HLTwDIGI75e33(UpgradeWorkflow):
def setup_(self, step, stepName, stepDict, k, properties):
if 'DigiTrigger' in step:
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