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commit clearlinux-pkgs/linux@eeb54f6 It was Power Super Save which Enable PCI Express ASPM L0s and L1 where possible, even if the BIOS did not, and also enables L1 substates where possible. This would result in higher power savings while staying in L1 where the components support it. Now it is Disable PCI Express ASPM L0s and L1, even if the BIOS enabled them. Related-to: clearlinux/clr-installer#588 Related-to: clearlinux/distribution#392 Related-to: clearlinux/distribution#1312
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