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config: set PCIe ASM as Performance
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commit clearlinux-pkgs/linux@eeb54f6

It was Power Super Save which

  Enable PCI Express ASPM L0s and L1 where possible, even if the
  BIOS did not, and also enables L1 substates where
  possible. This would result in higher power savings while staying in L1
  where the components support it.

Now it is

  Disable PCI Express ASPM L0s and L1, even if the BIOS enabled them.

Related-to: clearlinux/clr-installer#588
Related-to: clearlinux/distribution#392
Related-to: clearlinux/distribution#1312
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miguelinux committed Feb 27, 2020
1 parent 8edc6e0 commit 62edb89
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Showing 2 changed files with 4 additions and 4 deletions.
4 changes: 2 additions & 2 deletions config
Original file line number Diff line number Diff line change
Expand Up @@ -807,9 +807,9 @@ CONFIG_PCIEAER=y
CONFIG_PCIEASPM=y
# CONFIG_PCIEASPM_DEBUG is not set
# CONFIG_PCIEASPM_DEFAULT is not set
CONFIG_PCIEASPM_POWERSAVE=y
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
# CONFIG_PCIEASPM_PERFORMANCE is not set
CONFIG_PCIEASPM_PERFORMANCE=y
CONFIG_PCIE_PME=y
# CONFIG_PCIE_DPC is not set
# CONFIG_PCIE_PTM is not set
Expand Down
4 changes: 2 additions & 2 deletions config-fragment
Original file line number Diff line number Diff line change
Expand Up @@ -2177,8 +2177,6 @@ CONFIG_PATA_SCH=y
# CONFIG_PCIEAER_INJECT is not set
# CONFIG_PCIEASPM_DEBUG is not set
# CONFIG_PCIEASPM_DEFAULT is not set
# CONFIG_PCIEASPM_PERFORMANCE is not set
CONFIG_PCIEASPM_POWERSAVE=y
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
# CONFIG_PCIE_ECRC is not set
CONFIG_PCI_ENDPOINT_CONFIGFS=y
Expand Down Expand Up @@ -3501,3 +3499,5 @@ CONFIG_CRYPTO_DEV_CHELSIO_TLS=m
CONFIG_PKCS7_TEST_KEY=m
CONFIG_MOUSE_PS2_VMMOUSE=y
CONFIG_X86_INTEL_TSX_MODE_AUTO=y
# CONFIG_PCIEASPM_POWERSAVE is not set
CONFIG_PCIEASPM_PERFORMANCE=y

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