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Make it legal for concrete resets to drive abstract reset #2018

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merged 2 commits into from
Jul 9, 2021
Merged

Make it legal for concrete resets to drive abstract reset #2018

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9c574b0
Make it legal for concrete resets to drive abstract reset
jackkoenig Jul 8, 2021
ea22509
Merge branch 'master' into concrete-reset-drive-abstract-reset
jackkoenig Jul 8, 2021
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10 changes: 0 additions & 10 deletions core/src/main/scala/chisel3/Bits.scala
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Original file line number Diff line number Diff line change
Expand Up @@ -961,11 +961,6 @@ final class ResetType(private[chisel3] val width: Width = Width(1)) extends Elem
private[chisel3] def typeEquivalent(that: Data): Boolean =
this.getClass == that.getClass

override def connect(that: Data)(implicit sourceInfo: SourceInfo, connectCompileOptions: CompileOptions): Unit = that match {
case _: Reset | DontCare => super.connect(that)(sourceInfo, connectCompileOptions)
case _ => super.badConnect(that)(sourceInfo)
}

override def litOption = None

/** Not really supported */
Expand Down Expand Up @@ -1008,11 +1003,6 @@ sealed class AsyncReset(private[chisel3] val width: Width = Width(1)) extends El
private[chisel3] def typeEquivalent(that: Data): Boolean =
this.getClass == that.getClass

override def connect(that: Data)(implicit sourceInfo: SourceInfo, connectCompileOptions: CompileOptions): Unit = that match {
case _: AsyncReset | DontCare => super.connect(that)(sourceInfo, connectCompileOptions)
case _ => super.badConnect(that)(sourceInfo)
}

override def litOption = None

/** Not really supported */
Expand Down
2 changes: 2 additions & 0 deletions core/src/main/scala/chisel3/internal/MonoConnect.scala
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Expand Up @@ -103,6 +103,8 @@ private[chisel3] object MonoConnect {
elemConnect(sourceInfo, connectCompileOptions, sink_e, source_e, context_mod)
case (sink_e: ResetType, source_e: Reset) =>
elemConnect(sourceInfo, connectCompileOptions, sink_e, source_e, context_mod)
case (sink_e: Reset, source_e: ResetType) =>
elemConnect(sourceInfo, connectCompileOptions, sink_e, source_e, context_mod)
case (sink_e: EnumType, source_e: UnsafeEnum) =>
elemConnect(sourceInfo, connectCompileOptions, sink_e, source_e, context_mod)
case (sink_e: EnumType, source_e: EnumType) if sink_e.typeEquivalent(source_e) =>
Expand Down
20 changes: 20 additions & 0 deletions src/test/scala/chiselTests/ResetSpec.scala
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Expand Up @@ -44,6 +44,26 @@ class ResetSpec extends ChiselFlatSpec with Utils {
ChiselStage.elaborate(new AbstractResetDontCareModule)
}

it should "be able to drive Bool" in {
ChiselStage.emitVerilog(new RawModule {
val in = IO(Input(Bool()))
val out = IO(Output(Bool()))
val w = Wire(Reset())
w := in
out := w
})
}

it should "be able to drive AsyncReset" in {
ChiselStage.emitVerilog(new RawModule {
val in = IO(Input(AsyncReset()))
val out = IO(Output(AsyncReset()))
val w = Wire(Reset())
w := in
out := w
})
}

it should "allow writing modules that are reset agnostic" in {
val sync = compile(new Module {
val io = IO(new Bundle {
Expand Down