Move circuitVar from HasId to BaseModule (backport #4253) (#4263)

* Move circuitVar from HasId to BaseModule (#4253) (cherry picked from commit 18d21fb) * Waive package private binary compatibility issues --------- Co-authored-by: Jack Koenig <[email protected]>
chipsalliance · Jul 10, 2024 · 5506170 · 5506170
1 parent 2bc4859
commit 5506170
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Showing 3 changed files with 19 additions and 11 deletions.
diff --git a/build.sbt b/build.sbt
@@ -389,7 +389,10 @@ lazy val unipublish =
         // chisel3.internal.firrtl.ir.LitArg is package private
         ProblemFilters.exclude[ReversedMissingMethodProblem]("chisel3.internal.firrtl.ir#LitArg.cloneWithValue"),
         // chisel3.Bits is sealed
-        ProblemFilters.exclude[ReversedMissingMethodProblem]("chisel3.Bits._padLit")
+        ProblemFilters.exclude[ReversedMissingMethodProblem]("chisel3.Bits._padLit"),
+        // _circuit was package private
+        ProblemFilters.exclude[DirectMissingMethodProblem]("chisel3.*._circuit"),
+        ProblemFilters.exclude[DirectMissingMethodProblem]("chisel3.*._circuit_=")
       ),
       // Forward doc command to unidoc
       Compile / doc := (ScalaUnidoc / doc).value,

diff --git a/core/src/main/scala/chisel3/Module.scala b/core/src/main/scala/chisel3/Module.scala
@@ -421,6 +421,13 @@ package experimental {
   abstract class BaseModule extends HasId with IsInstantiable {
     _parent.foreach(_.addId(this))
 
+    // Set if the returned top-level module of a nested call to the Chisel Builder, see Definition.apply
+    private var _circuitVar:       BaseModule = null // using nullable var for better memory usage
+    private[chisel3] def _circuit: Option[BaseModule] = Option(_circuitVar)
+    private[chisel3] def _circuit_=(target: Option[BaseModule]): Unit = {
+      _circuitVar = target.getOrElse(null)
+    }
+
     // Protected so it can be overridden by the compiler plugin
     protected def _sourceInfo: SourceInfo = UnlocatableSourceInfo
 

diff --git a/core/src/main/scala/chisel3/internal/Builder.scala b/core/src/main/scala/chisel3/internal/Builder.scala
@@ -121,13 +121,6 @@ private[chisel3] trait HasId extends chisel3.InstanceId {
     _parentVar = target.getOrElse(null)
   }
 
-  // Set if the returned top-level module of a nested call to the Chisel Builder, see Definition.apply
-  private var _circuitVar:       BaseModule = null // using nullable var for better memory usage
-  private[chisel3] def _circuit: Option[BaseModule] = Option(_circuitVar)
-  private[chisel3] def _circuit_=(target: Option[BaseModule]): Unit = {
-    _circuitVar = target.getOrElse(null)
-  }
-
   private[chisel3] val _id: Long = Builder.idGen.next
 
   // TODO: remove this, but its removal seems to cause a nasty Scala compiler crash.
@@ -350,9 +343,14 @@ private[chisel3] trait HasId extends chisel3.InstanceId {
   }
   def circuitName: String = _parent match {
     case None =>
-      _circuit match {
-        case None    => instanceName
-        case Some(o) => o.circuitName
+      // Only modules have circuits
+      this match {
+        case b: BaseModule =>
+          b._circuit match {
+            case Some(c) => c.circuitName
+            case None    => instanceName
+          }
+        case _ => instanceName
       }
     case Some(ViewParent) => reifyParent.circuitName
     case Some(p)          => p.circuitName