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Add simple ROM test for SoC interface #1618

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6 changes: 6 additions & 0 deletions builder/src/firmware.rs
Original file line number Diff line number Diff line change
Expand Up @@ -315,6 +315,11 @@ pub mod rom_tests {
..BASE_FWID
};

pub const SOC_TESTS: FwId = FwId {
bin_name: "soc_tests",
..BASE_FWID
};

pub const TEST_FMC_WITH_UART: FwId = FwId {
crate_name: "caliptra-rom-test-fmc",
bin_name: "caliptra-rom-test-fmc",
Expand Down Expand Up @@ -428,6 +433,7 @@ pub const REGISTERED_FW: &[&FwId] = &[
&driver_tests::TRNG_DRIVER_RESPONDER,
&driver_tests::PERSISTENT,
&rom_tests::ASM_TESTS,
&rom_tests::SOC_TESTS,
&rom_tests::TEST_FMC_WITH_UART,
&rom_tests::FAKE_TEST_FMC_WITH_UART,
&rom_tests::TEST_FMC_INTERACTIVE,
Expand Down
5 changes: 5 additions & 0 deletions rom/dev/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -67,3 +67,8 @@ fips-test-hooks = ["caliptra-drivers/fips-test-hooks", "caliptra-image-verify/fi
[[bin]]
name = "asm_tests"
path = "test-fw/asm_tests.rs"

[[bin]]
name = "soc_tests"
path = "test-fw/soc_tests.rs"
required-features = ["riscv"]
16 changes: 10 additions & 6 deletions rom/dev/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -61,6 +61,16 @@ fn main() {
use std::fs;

let out_dir = PathBuf::from(env::var("OUT_DIR").unwrap());

println!("!!!!!!!!!!");

println!("cargo:rustc-link-search={}", out_dir.display());
println!("cargo:rustc-link-arg=-Trom.ld");
println!("cargo:rerun-if-changed=src/rom.ld");
println!("cargo:rerun-if-changed=src/start.S");
println!("cargo:rerun-if-changed=build.rs");
println!("cargo:rerun-if-changed=test-fw/start_min.S");

fs::write(out_dir.join("rom.ld"), include_bytes!("src/rom.ld")).unwrap();

let preprocessor_vars: Vec<_> = env::vars()
Expand All @@ -72,12 +82,6 @@ fn main() {
preprocess("src/start.S", &preprocessor_vars),
)
.unwrap();

println!("cargo:rustc-link-search={}", out_dir.display());
println!("cargo:rustc-link-arg=-Trom.ld");
println!("cargo:rerun-if-changed=src/rom.ld");
println!("cargo:rerun-if-changed=src/start.S");
println!("cargo:rerun-if-changed=build.rs");
}

if cfg!(feature = "fake-rom") {
Expand Down
53 changes: 22 additions & 31 deletions rom/dev/src/start.S
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ Abstract:
Environment:

ROM

--*/

.section .init, "ax"
Expand All @@ -25,7 +25,7 @@ _start:
// Clear minstret
csrw minstret, zero
csrw minstreth, zero

// Disable interrupts and clear pending interrupts
csrw mstatus, 0
csrw mie, 0
Expand Down Expand Up @@ -57,29 +57,29 @@ _start:
// each. Each region has 2 possible attributes:
// 1. Cacheability
// 2. Side Effects
//
//
// Caliptra does not have any caches hence the Cacheability
// attribute is zero for all regions. Side-effect as not
// observable in memory regions containing ROM, ICCM & DCCM.
// However they are enabled for regions containing peripheral
// registers.
//
// ---------------------------------------------
// | Region | Side Effect | Cacheable |
// | Region | Side Effect | Cacheable |
// ---------------------------------------------
// | 0x0000_0000 | 0 | 1 |
// | 0x4000_0000 | 0 | 0 |
// | 0x5000_0000 | 0 | 0 |
// | Others | 1 | 0 |
// | 0x0000_0000 | 0 | 1 |
// | 0x4000_0000 | 0 | 0 |
// | 0x5000_0000 | 0 | 0 |
// | Others | 1 | 0 |
// ---------------------------------------------
//
// CSR MRAC = 0x7C0
// CSR MRAC = 0x7C0
li x1, 0xAAAAA0A9
csrw 0x7C0, x1

// Setup stack pointer
// Setup stack pointer
la sp, _sstack

// Interrupts are disabled and will remain disabled in ROM so we only
// need to worry about exceptions, so no reason to do vectored.
// Setup Direct Exception Vector
Expand Down Expand Up @@ -109,31 +109,22 @@ _start:
//

// Zero ICCM
la a0, ICCM_ORG // dest
la a1, ICCM_SIZE // len
call _zero_mem256

// Zero DCCM
la a0, DCCM_ORG // dest
la a1, DCCM_SIZE // len
call _zero_mem256

post_ecc_init:

// Copy Data Section
// Copy Data Section
// la a0, _sdata // dest
// la a1, _sidata // src
// la a2, _data_len // len
// la a2, _data_len // len
// call _copy_mem32

// Zero BSS Section
// la a0, _sbss // dest
// la a1, _bss_len // len
// call _zero_mem32
// Zero BSS Section

tail rom_entry

.cfi_endproc
.cfi_endproc

.section .init.text, "ax"
.align 2
Expand All @@ -142,7 +133,7 @@ _zero_mem256:
// Can't use "sw x0" below if we want c.sw
li a2, 0
add a1, a1, a0
1:
1:
sw a2, 0(a0)
sw a2, 4(a0)
sw a2, 8(a0)
Expand All @@ -161,7 +152,7 @@ _zero_mem256:
_copy_mem32:
.cfi_startproc
li t0, 4
1:
1:
beqz a2, 1f
lw t1, 0(a1)
sw t1, 0(a0)
Expand All @@ -170,7 +161,7 @@ _copy_mem32:
sub a2, a2, t0
j 1b
1:
ret
ret
.cfi_endproc

.section .init.text, "ax"
Expand All @@ -182,7 +173,7 @@ _exception_handler:
// Switch to exception stack
la sp, _sestack

// Allocate space for all relevant registers
// Allocate space for all relevant registers
// (ra, sp, a0-7, t0-6, mepc, mcause, mscause, mstatus, mtval)
addi sp, sp, -88

Expand Down Expand Up @@ -351,12 +342,12 @@ exit_rom:
//
// Clear the stack
//

// Save the FMC address
addi a3, a0, 0
la a0, STACK_ORG // dest
la a1, STACK_SIZE // len
call _zero_mem256
la a1, STACK_SIZE // len
;call _zero_mem256

// Clear all registers
li x1, 0; li x2, 0; li x3, 0; li x4, 0;
Expand Down
73 changes: 73 additions & 0 deletions rom/dev/test-fw/soc_tests.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,73 @@
// Licensed under the Apache-2.0 license

#![no_std]
#![no_main]

core::arch::global_asm!(include_str!("start_min.S"));

#[path = "../src/exception.rs"]
mod exception;

use caliptra_drivers::cprintln;
use caliptra_drivers::ExitCtrl;

#[no_mangle]
#[inline(never)]
extern "C" fn exception_handler(exception: &exception::ExceptionRecord) {
cprintln!(
"EXCEPTION mcause=0x{:08X} mscause=0x{:08X} mepc=0x{:08X}",
exception.mcause,
exception.mscause,
exception.mepc
);

ExitCtrl::exit(1);
}

#[no_mangle]
#[inline(never)]
extern "C" fn nmi_handler(exception: &exception::ExceptionRecord) {
cprintln!(
"NMI mcause=0x{:08X} mscause=0x{:08X} mepc=0x{:08X}",
exception.mcause,
exception.mscause,
exception.mepc
);

ExitCtrl::exit(1);
}

#[panic_handler]
#[inline(never)]
#[cfg(not(feature = "std"))]
fn handle_panic(pi: &core::panic::PanicInfo) -> ! {
match pi.location() {
Some(loc) => cprintln!("Panic at file {} line {}", loc.file(), loc.line()),
_ => {}
}
ExitCtrl::exit(1);
}

#[no_mangle]
pub extern "C" fn rom_entry() -> ! {
let mut soc_ifc = unsafe { caliptra_registers::soc_ifc::SocIfcReg::new() };

let fuse_wr_done: u32 = soc_ifc.regs_mut().cptra_fuse_wr_done().read().into();
let valid_pauser: u32 = soc_ifc
.regs_mut()
.cptra_mbox_valid_pauser()
.at(0)
.read()
.into();
let fuse_life_cycle: u32 = soc_ifc.regs_mut().fuse_life_cycle().read().into();

// Print some registers populated by SoC
cprintln!("FUSE_WR_DONE = {}", fuse_wr_done);
cprintln!("VALID_PAUSER[0] = {}", valid_pauser);
cprintln!("FUSE_LIFE_CYCLE = {}", fuse_life_cycle);

// Write to some registers read by SoC
soc_ifc.regs_mut().cptra_boot_status().write(|_| 0xff);

ExitCtrl::exit(0)
}
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